8}X( (} 7phytec,am335x-wegaphytec,am335x-phycore-somti,am33xx +7Phytec AM335x phyBOARD-WEGAchosenaliases=/ocp/i2c@44e0b000B/ocp/i2c@4802a000G/ocp/i2c@4819c000L/ocp/serial@44e09000T/ocp/serial@48022000\/ocp/serial@48024000d/ocp/serial@481a6000l/ocp/serial@481a8000t/ocp/serial@481aa000|/ocp/can@481cc000/ocp/can@481d0000/ocp/usb@47400000/usb@47401000/ocp/usb@47400000/usb@47401800#/ocp/usb@47400000/usb-phy@47401300#/ocp/usb@47400000/usb-phy@47401b00&/ocp/ethernet@4a100000/slave@4a100200&/ocp/ethernet@4a100000/slave@4a100300/ocp/spi@48030000/ocp/spi@481a0000/ocp/i2c@44e0b000/rtc@68/ocp/rtc@44e3e000cpus+cpu@0arm,cortex-a8cpucpu opp-tableoperating-points-v2-ti-cpuopp50-300000000& -~4(;Lopp100-275000000&d* -r;Lopp100-300000000& -r; Lopp100-500000000&e -r;opp100-600000000&#F -r;@opp120-600000000&#F -O@;opp120-720000000&*T -O@;oppturbo-720000000&*T -9pP;oppturbo-800000000&/ -9pP;oppnitro-1000000000&; -7DL;pmu@4b000000arm,cortex-a8-pmuXKcdebugsssocti,omap-inframpu ti,omap3-mpucmpuocp simple-bus+mcl3_mainl4_wkup@44c00000ti,am3-l4-wkupsimple-bus+ mD(wkup_m3@100000ti,am3352-wkup-m3@  tumemdmemcwkup_m3~am335x-pm-firmware.elf!prcm@200000ti,am3-prcmsimple-bus @+ m @clocks+clk_32768_ck fixed-clockclk_rc32k_ck fixed-clock}virt_19200000_ck fixed-clock$virt_24000000_ck fixed-clockn6virt_25000000_ck fixed-clock}x@virt_26000000_ck fixed-clocktclkin_ck fixed-clockdpll_core_ck@490ti,am3-dpll-core-clock \hdpll_core_x2_ckti,am3-dpll-x2-clockdpll_core_m4_ck@480ti,divider-clockdpll_core_m5_ck@484ti,divider-clockdpll_core_m6_ck@4d8ti,divider-clockdpll_mpu_ck@488ti,am3-dpll-clock  ,dpll_mpu_m2_ck@4a8ti,divider-clockdpll_ddr_ck@494ti,am3-dpll-no-gate-clock 4@ dpll_ddr_m2_ck@4a0ti,divider-clock  dpll_ddr_m2_div2_ckfixed-factor-clock dpll_disp_ck@498ti,am3-dpll-no-gate-clock HT dpll_disp_m2_ck@4a4ti,divider-clock dpll_per_ck@48c!ti,am3-dpll-no-gate-j-type-clock p dpll_per_m2_ck@4acti,divider-clock  dpll_per_m2_div4_wkupdm_ckfixed-factor-clock dpll_per_m2_div4_ckfixed-factor-clock clk_24mhzfixed-factor-clock clkdiv32k_ckfixed-factor-clockl3_gclkfixed-factor-clockpruss_ocp_gclk@530 ti,mux-clock0mmu_fck@914ti,gate-clock timer1_fck@528 ti,mux-clock8(4timer2_fck@508 ti,mux-clock85timer3_fck@50c ti,mux-clock8 timer4_fck@510 ti,mux-clock8timer5_fck@518 ti,mux-clock8timer6_fck@51c ti,mux-clock8timer7_fck@504 ti,mux-clock8usbotg_fck@47cti,gate-clock |dpll_core_m4_div2_ckfixed-factor-clockieee5000_fck@e4ti,gate-clockwdt1_fck@538 ti,mux-clock88l4_rtc_gclkfixed-factor-clockl4hs_gclkfixed-factor-clockl3s_gclkfixed-factor-clockl4fw_gclkfixed-factor-clockl4ls_gclkfixed-factor-clock sysclk_div_ckfixed-factor-clockcpsw_125mhz_gclkfixed-factor-clock>cpsw_cpts_rft_clk@520 ti,mux-clock ?gpio0_dbclk_mux_ck@53c ti,mux-clock8<lcd_gclk@534 ti,mux-clock  4mmc_clkfixed-factor-clock gfx_fclk_clksel_ck@52c ti,mux-clock ,gfx_fck_div_ck@52cti,divider-clock,sysclkout_pre_ck@700 ti,mux-clock clkout2_div_ck@700ti,divider-clockclkout2_ck@700ti,gate-clockclockdomainsl4_per_cm@0 ti,omap4-cm+ mclk@14 ti,clkctrl<l4_wkup_cm@400 ti,omap4-cm+ mclk@4 ti,clkctrlmpu_cm@600 ti,omap4-cm+ mclk@4 ti,clkctrll4_rtc_cm@800 ti,omap4-cm+ mclk@0 ti,clkctrlgfx_l3_cm@900 ti,omap4-cm + m clk@4 ti,clkctrll4_cefuse_cm@a00 ti,omap4-cm + m clk@20 ti,clkctrl scm@210000ti,am3-scmsimple-bus! + m! pinmux@800pinctrl-single8+ .pinmux_ethernet0@K !! $ ( <!@!D @pinmux_mdioKH0LBpinmux_i2c0K((*pinmux_nandflashpK000 00000p0|Epinmux_spi0 KP T X0\06pinmux_mcasp0(K   Hpinmux_dcan1Khl23pinmux_ethernet1pK@ D!H L P T X!\!`!d!h!l!t!x!Apinmux_mmc18K000000`7/pinmux_uart0Kp0t(pinmux_uart1_pins K0x(|)scm_conf@0sysconsimple-bus+ mclocks+sys_clkin_ck@40 ti,mux-clock@adc_tsc_fckfixed-factor-clockdcan0_fckfixed-factor-clock1dcan1_fckfixed-factor-clock2mcasp0_fckfixed-factor-clockKmcasp1_fckfixed-factor-clocksmartreflex0_fckfixed-factor-clocksmartreflex1_fckfixed-factor-clocksha0_fckfixed-factor-clockaes0_fckfixed-factor-clockrng_fckfixed-factor-clockehrpwm0_tbclk@44e10664ti,gate-clock d;ehrpwm1_tbclk@44e10664ti,gate-clock d<ehrpwm2_tbclk@44e10664ti,gate-clock d=wkup_m3_ipc@1324ti,am3352-wkup-m3-ipc$$XN_!h"#dma-router@f90ti,am335x-edma-crossbar@oz $.clockdomainsinterrupt-controller@48200000ti,am33xx-intcH edma@49000000ti,edma3-tpccctpccI tedma3_cc X 'edma3_ccintedma3_mperredma3_ccerrintz@o%&'$tptc@49800000ti,edma3-tptcctptc0IXpedma3_tcerrint%tptc@49900000ti,edma3-tptcctptc1IXqedma3_tcerrint&tptc@49a00000ti,edma3-tptcctptc2IXredma3_tcerrint'gpio@44e07000ti,omap4-gpiocgpio1DpX`0gpio@4804c000ti,omap4-gpiocgpio2HXbgpio@481ac000ti,omap4-gpiocgpio3HX gpio@481ae000ti,omap4-gpiocgpio4HX>serial@44e09000ti,am3352-uartti,omap3-uartcuart1lD XHokay $$txrxdefault*(serial@48022000ti,am3352-uartti,omap3-uartcuart2lH XIokay $$txrxdefault*)serial@48024000ti,am3352-uartti,omap3-uartcuart3lH@ XJ disabled $$txrxserial@481a6000ti,am3352-uartti,omap3-uartcuart4lH` X, disabledserial@481a8000ti,am3352-uartti,omap3-uartcuart5lH X- disabledserial@481aa000ti,am3352-uartti,omap3-uartcuart6lH X. disabledi2c@44e0b000 ti,omap4-i2c+ci2c1DXFokaydefault**pmic@2d- ti,tps659104+@+L+X+d+p+|++regulators+regulator@0vrtcregulator@1vioregulator@2vdd1vdd_mpu tregulator@3vdd2 vdd_core t0regulator@4vdd3regulator@5vdig1 vdig1_1p8vw@w@-regulator@6vdig2regulator@7vpllregulator@8vdacregulator@9 vaux1regulator@10 vaux2regulator@11 vaux33regulator@12 vmmc2Z2Zregulator@13 vbbtemp@4b ti,tmp102K disabledeeprom@52 atmel,24c32 Rokayrtc@68microcrystal,rv4162hokaytlv320aic3007@18ti,tlv320aic3007,$,1,>-okayIi2c@4802a000 ti,omap4-i2c+ci2c2HXG disabledi2c@4819c000 ti,omap4-i2c+ci2c3HX disabledmmc@48060000ti,omap4-hsmmccmmc1JWn  ..txrxX@Hokay,default*/ 0mmc@481d8000ti,omap4-hsmmccmmc2W $$txrxXH disabledmmc@47810000ti,omap4-hsmmccmmc3WXG disabledspinlock@480ca000ti,omap4-hwspinlockH  cspinlockwdt@44e35000 ti,omap3-wdt cwd_timer2DPX[can@481cc000ti,am3352-d_cancd_can0H 1fck DX4 disabledcan@481d0000ti,am3352-d_cancd_can1H 2fck DX7okaydefault*3mailbox@480c8000ti,omap4-mailboxH XMcmailbox"wkup_m3   #timer@44e31000ti,am335x-timer-1msDXCctimer1 4fcktimer@48040000ti,am335x-timerHXDctimer25fcktimer@48042000ti,am335x-timerH XEctimer3timer@48044000ti,am335x-timerH@X\ctimer4/timer@48046000ti,am335x-timerH`X]ctimer5/timer@48048000ti,am335x-timerHX^ctimer6/timer@4804a000ti,am335x-timerHX_ctimer7/rtc@44e3e000ti,am3352-rtcti,da830-rtcDXKLcrtc 8int-clkspi@48030000ti,omap4-mcspi+HXA<cspi00 $$$$tx0rx0tx1rx1okaydefault*6m25p80@0jedec,spi-norJl\ disabled+spi@481a0000ti,omap4-mcspi+HX}<cspi10 $*$+$,$-tx0rx0tx1rx1 disabledusb@47400000ti,am33xx-usbG@m+ cusb_otg_hsokaycontrol@44e10620ti,am335x-usb-ctrl-moduleD DHtphy_ctrlwakeupokay7usb-phy@47401300ti,am335x-usb-phyG@tphyokayk7w8usb@47401000ti,musb-am33xxokayG@G@ tmccontrolXmcotg 8h 9999999999 9 9 9 9 99999999999 9 9 9 9 9rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15usb-phy@47401b00ti,am335x-usb-phyG@tphyokayk7w:usb@47401800ti,musb-am33xxokayG@G@ tmccontrolXmchost :h 999999999999999999999999999999rx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15dma-controller@47402000ti,am3359-cppi41 G@G@ G@0G@@@#tgluecontrollerschedulerqueuemgrXglueookay9epwmss@48300000ti,am33xx-pwmssH0cepwmss0+ disabled$mH0H0H0H0H0H0ecap@48300100ti,am3352-ecapti,am33xx-ecapH0 fckXecap0 disabledpwm@48300200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0;  tbclkfck disabledepwmss@48302000ti,am33xx-pwmssH0 cepwmss1+ disabled$mH0!H0!H0!H0!H0"H0"ecap@48302100ti,am3352-ecapti,am33xx-ecapH0! fckX/ecap1 disabledpwm@48302200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0"<  tbclkfck disabledepwmss@48304000ti,am33xx-pwmssH0@cepwmss2+ disabled$mH0AH0AH0AH0AH0BH0Becap@48304100ti,am3352-ecapti,am33xx-ecapH0A fckX=ecap2 disabledpwm@48304200"ti,am3352-ehrpwmti,am33xx-ehrpwmH0B=  tbclkfck disabledethernet@4a100000ti,am335x-cpswti,cpswccpgmac0>? fckcpts  '.;KJJ+X()*+mokaydefault*@A\mdio@4a101000ti,cpsw-mdioti,davinci_mdio+ cdavinci_mdiofB@Jokaydefault*Bethernet-phy@0Cethernet-phy@1Dslave@4a100200o{Crmiislave@4a100300o{Dmiicpsw-phy-sel@44e10650ti,am3352-cpsw-phy-selDP tgmii-selocmcram@40300000 mmio-sram@0elm@48080000ti,am3352-elmH XcelmokayGlcdc@4830e000ti,am33xx-tilcdcH0X$clcdc disabledtscadc@44e0d000ti,am3359-tscadcDXcadc_tsc disabled $5$9 fifo0fifo1tscti,am3359-tscadcti,am3359-adcemif@4c000000ti,emif-am3352Lcemifgpmc@50000000ti,am3352-gpmccgpmcP Xd  $4rxtx+okaydefault*EmFnand@0,0ti,omap2-nand  FX F bch8true-?P^p "92SmG+sham@53100000ti,omap4-shamcshamSXm  $$rxokayaes@53500000 ti,omap4-aescaesSPXg $$txrxokaymcasp@48038000ti,am33xx-mcasp-audiocmcasp0H F@tmpudatXPQtxrxokay $$ txrxdefault*HJmcasp@4803c000ti,am33xx-mcasp-audiocmcasp1H F@@tmpudatXRStxrx disabled $ $ txrxrng@48310000 ti,omap4-rngcrngH1 Xomemory@80000000memoryҀregulators simple-busfixedregulator0regulator-fixedvcc5vLK@LK@+fixedregulator1regulator-fixedvcc3v32Z2Z,sound_ifaceti,da830-evm-audio AM335x-WegaI J< Line OutLLOUTLine OutRLOUTLINE1LLine InLINE1RLine InKmclkokay compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2serial0serial1serial2serial3serial4serial5d_can0d_can1usb0usb1phy0phy1ethernet0ethernet1spi0spi1rtc0rtc1device_typeregoperating-points-v2clocksclock-namesclock-latencycpu0-supplysysconphandleopp-hzopp-microvoltopp-supported-hwopp-suspendinterruptsti,hwmodsrangesreg-namesti,pm-firmware#clock-cellsclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-rate-parentti,bit-shift#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsti,rprocmboxes#dma-cellsdma-requestsdma-mastersinterrupt-controller#interrupt-cellsinterrupt-namesti,tptcsti,edma-memcpy-channelsgpio-controller#gpio-cellsstatusdmasdma-namespinctrl-namespinctrl-0vcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc5-supplyvcc6-supplyvcc7-supplyvccio-supplyregulator-compatibleregulator-always-onregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onpagesizeAVDD-supplyIOVDD-supplyDRVDD-supplyDVDD-supplyti,dual-voltti,needs-special-resetti,needs-special-hs-handlingvmmc-supplybus-widthcd-gpios#hwlock-cellssyscon-raminit#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-send-noirqti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmti,spi-num-csspi-max-frequencym25p,fast-readti,ctrl_mod#phy-cellsdr_modementor,multipointmentor,num-epsmentor,ram-bitsmentor,powerphys#dma-channels#dma-requests#pwm-cellscpdma_channelsale_entriesbd_ram_sizemac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftdual_emacbus_freqmac-addressphy-handlephy-modedual_emac_res_vlanrmii-clock-ext#io-channel-cellsti,no-idle-on-initgpmc,num-csgpmc,num-waitpinsrb-gpiosnand-bus-widthti,nand-ecc-optgpmc,device-nandgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,cycle2cycle-diffcsengpmc,clk-activation-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsti,elm-idop-modetdm-slotsserial-dirtx-num-evtrt-num-evtti,modelti,audio-codecti,mcasp-controllerti,audio-routing