Ð þ혽8((•ð)compulab,am437x-cm-t43ti,am4372ti,am43 +7CompuLab CM-T43chosenmemory@0=memoryIaliasesM/ocp@44000000/i2c@44e0b000R/ocp@44000000/i2c@4802a000W/ocp@44000000/i2c@4819c000\/ocp@44000000/serial@44e09000d/ocp@44000000/serial@48022000l/ocp@44000000/serial@48024000t/ocp@44000000/serial@481a6000|/ocp@44000000/serial@481a8000„/ocp@44000000/serial@481aa000/Œ/ocp@44000000/ethernet@4a100000/slave@4a100200/–/ocp@44000000/ethernet@4a100000/slave@4a100300 /ocp@44000000/qspi@47900000cpus+cpu@0arm,cortex-a9=cpuI¥¬cpu¸Ì“àÚ(æB@KP 59à ü€O€ 'ÀÈà“à~ðopp-tableoperating-points-v2-ti-cpu÷þopp50-300000000ᣠ ~ð4¸É(ÿ,opp100-600000000#ÃF  ÈàrðÐÿopp120-720000000*êT  O€ñÀ­@ÿoppturbo-800000000/¯  9à×pœPÿoppnitro-1000000000;šÊ  7ÈÐDŸLÿ interrupt-controller@48241000arm,cortex-a9-gic8MIH$H$ þinterrupt-controller@48281000ti,omap4-wugen-mpu8MIH( þscu@48240000arm,cortex-a9-scuIH$timer@48240200arm,cortex-a9-global-timerIH$ ^  ¥timer@48240600arm,cortex-a9-twd-timerIH$ ^  ¥l2-cache-controller@48242000arm,pl310-cacheIH$ iwocp@44000000ti,am4372-l3-nocsimple-bus+ƒŠl3_mainID@D€@^  l4_wkup@44c00000ti,am4-l4-wkupsimple-bus+ ƒDÀ(pwkup_m3@100000ti,am4372-wkup-m3I@  ”umemdmemŠwkup_m3žam335x-pm-firmware.elfþ*prcm@1f0000ti,am4-prcmsimple-busI ^ + ƒclocks+clk_32768_ck­ fixed-clockº€þclk_rc32k_ck­ fixed-clockº€þvirt_19200000_ck­ fixed-clockº$øþ%virt_24000000_ck­ fixed-clockºn6þ&virt_25000000_ck­ fixed-clockº}x@þ'virt_26000000_ck­ fixed-clockºŒº€þ(tclkin_ck­ fixed-clockºŒº€þdpll_core_ck@2d20­ti,am3-dpll-core-clock¥ I- -$-,þ dpll_core_x2_ck­ti,am3-dpll-x2-clock¥ þ dpll_core_m4_ck@2d38­ti,divider-clock¥ ÊÕI-8çþþdpll_core_m5_ck@2d3c­ti,divider-clock¥ ÊÕI-<çþþdpll_core_m6_ck@2d40­ti,divider-clock¥ ÊÕI-@çþdpll_mpu_ck@2d60­ti,am3-dpll-clock¥ I-`-d-lþdpll_mpu_m2_ck@2d70­ti,divider-clock¥ÊÕI-pçþþ mpu_periphclk­fixed-factor-clock¥  þdpll_ddr_ck@2da0­ti,am3-dpll-clock¥ I- -¤-¬þ dpll_ddr_m2_ck@2db0­ti,divider-clock¥ ÊÕI-°çþdpll_disp_ck@2e20­ti,am3-dpll-clock¥ I. .$.,þ dpll_disp_m2_ck@2e30­ti,divider-clock¥ ÊÕI.0çþ*þdpll_per_ck@2de0­ti,am3-dpll-j-type-clock¥ I-à-ä-ìþdpll_per_m2_ck@2df0­ti,divider-clock¥ÊÕI-ðçþþdpll_per_m2_div4_wkupdm_ck­fixed-factor-clock¥ dpll_per_m2_div4_ck­fixed-factor-clock¥ clk_24mhz­fixed-factor-clock¥ þclkdiv32k_ck­fixed-factor-clock¥ Üþclkdiv32k_ick@2a38­ti,gate-clock¥=I*8þsysclk_div­fixed-factor-clock¥ þpruss_ocp_gclk@4248­ ti,mux-clock¥IBHclk_32k_tpm_ck­ fixed-clockº€þtimer1_fck@4200­ ti,mux-clock¥IBþ1timer2_fck@4204­ ti,mux-clock ¥IBþ2timer3_fck@4208­ ti,mux-clock ¥IBtimer4_fck@420c­ ti,mux-clock ¥IB timer5_fck@4210­ ti,mux-clock ¥IBtimer6_fck@4214­ ti,mux-clock ¥IBtimer7_fck@4218­ ti,mux-clock ¥IBwdt1_fck@422c­ ti,mux-clock¥IB,l3_gclk­fixed-factor-clock¥ dpll_core_m4_div2_ck­fixed-factor-clock¥ þl4hs_gclk­fixed-factor-clock¥ l3s_gclk­fixed-factor-clock¥ þDl4ls_gclk­fixed-factor-clock¥ þ)cpsw_125mhz_gclk­fixed-factor-clock¥ þ7cpsw_cpts_rft_clk@4238­ ti,mux-clock ¥IB8þ8dpll_clksel_mac_clk@4234­ti,divider-clock¥IB4=Jþ9clk_32k_mosc_ck­ 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((67@FRWRh™°(Â+partition@0škernelI˜partition@980000šdtbI˜partition@a00000šrootfsI ocp2scp@483a8000"ti,am437x-ocp2scpti,omap-ocp2scp+ƒ Šocp2scp0phy@483a8000ti,am437x-usb2IH:€€Ú ¥HI@¬wkupclkrefclkëLokayþKocp2scp@483e8000"ti,am437x-ocp2scpti,omap-ocp2scp+ƒ Šocp2scp1phy@483e8000ti,am437x-usb2IH>€€Ú(¥JIH¬wkupclkrefclkëLokayþLomap_dwc3@48380000ti,am437x-dwc3 Šusb_otg_ss0IH8 ^¬+öƒLokayusb@48390000synopsys,dwc3IH9$^¨¨¬peripheralhostotgK usb2-phy high-speedhostLokay%>omap_dwc3@483c0000ti,am437x-dwc3 Šusb_otg_ss1IH< ^²+öƒLokayusb@483d0000synopsys,dwc3IH=$^®®²peripheralhostotgL usb2-phy high-speedhostLokay%>qspi@47900000ti,am4372-qspiIG0”qspi_baseqspi_mmap+Šqspi ^Š1 Ldisabledhdq@48347000ti,am4372-hdqIH4p ^‹¥M¬fckŠhdq1w Ldisableddss@4832a000 ti,omap3-dssIH2  Ldisabled Šdss_core¥N¬fck+ƒdispc@4832a400ti,omap3-dispcIH2¤ ^ Šdss_dispc¥N¬fckrfbi@4832a800ti,omap3-rfbiIH2¨ Šdss_rfbi¥N¬fck Ldisabledocmcram@40300000 mmio-sramI@0can@481cc000 ti,am4372-d_canti,am3352-d_canŠd_can0¥O¬fckIHÀ  WD ^4 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compatibleinterrupt-parent#address-cells#size-cellsmodeldevice_typeregi2c0i2c1i2c2serial0serial1serial2serial3serial4serial5ethernet0ethernet1spi0clocksclock-namesoperating-points-v2clock-latencycpu0-supplyoperating-pointssysconphandleopp-hzopp-microvoltopp-supported-hwopp-suspendinterrupt-controller#interrupt-cellsinterruptscache-unifiedcache-levelrangesti,hwmodsreg-namesti,pm-firmware#clock-cellsclock-frequencyti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitclock-multclock-divti,set-rate-parentti,bit-shiftti,dividersti,clock-multti,clock-div#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsti,rprocmboxes#dma-cellsdma-requestsdma-mastersinterrupt-namesti,tptcsti,edma-memcpy-channelsstatus#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-send-noirqti,mbox-txti,mbox-rxti,timer-alwonti,timer-pwmgpio-controller#gpio-cells#hwlock-cellsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onregulator-always-onregulator-suspend-enablepagesizedmasdma-namesspi-max-frequencylabelti,dual-voltti,needs-special-resetvmmc-supplybus-widthti,non-removableassigned-clocksassigned-clock-ratescpdma_channelsale_entriesbd_ram_sizemac_controlslavesactive_slavecpts_clock_multcpts_clock_shiftdual_emacbus_freqmac-addressphy_idphy-modedual_emac_res_vlan#pwm-cellsti,wiresti,x-plate-resistanceti,coordiante-readoutsti,wire-config#io-channel-cellsti,adc-channelsgpmc,num-csgpmc,num-waitpinsti,nand-ecc-optti,elm-idnand-bus-widthgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nssyscon-phy-power#phy-cellsutmi-modephysphy-namesmaximum-speeddr_modesnps,dis_u3_susphy_quirksnps,dis_u2_susphy_quirksyscon-raminitgpioslinux,default-triggerenable-active-high