Ð þíB#8<<(ç<ti,dm8168-evmti,dm8168 + 7DM8168 EVMchosenaliases=/ocp/i2c@48028000B/ocp/i2c@4802a000G/ocp/uart@48020000O/ocp/uart@48022000W/ocp/uart@48024000_/ocp/ethernet@4a100000i/ocp/ethernet@4a120000cpus+cpu@0arm,cortex-a8scpupmuarm,cortex-a8-pmuƒsocti,omap-inframpu ti,omap3-mpuŽmpuocp simple-busDƒ +˜prcm@48180000ti,dm816-prcmsimple-busH@+ ˜H@clocks+clkout_pre_ck@100Ÿ ti,mux-clock ¬³clkout_div_ck@100Ÿti,divider-clock¬»È³clkout_ck@100Ÿti,gate-clock¬»sysclk1_ck@300Ÿti,divider-clock¬Èsysclk2_ck@304Ÿti,divider-clock¬È³ sysclk3_ck@308Ÿti,divider-clock¬Èsysclk4_ck@30cŸti,divider-clock¬È ³sysclk5_ck@310Ÿti,divider-clock¬È³sysclk6_ck@314Ÿti,divider-clock¬Ósysclk10_ck@324Ÿti,divider-clock¬È$sysclk24_ck@3b4Ÿti,divider-clock¬È´³mpu_ck@15dcŸti,gate-clock¬ »Üaudio_pll_a_ck@35cŸti,divider-clock¬È\³ sysclk18_ck@378Ÿ ti,mux-clock¬ x³ timer1_fck@390Ÿ ti,mux-clock ¬ ³timer2_fck@394Ÿ ti,mux-clock ¬ ”³timer3_fck@398Ÿ ti,mux-clock ¬ ˜timer4_fck@39cŸ ti,mux-clock ¬ œtimer5_fck@3a0Ÿ ti,mux-clock ¬  timer6_fck@3a4Ÿ ti,mux-clock ¬ ¤timer7_fck@3a8Ÿ ti,mux-clock ¬ ¨clockdomainsdefault_cm@500 ti,omap4-cm+ ˜clk@0 ti,clkctrl\Ÿalwon_cm@1400 ti,omap4-cm+ ˜clk@0 ti,clkctrlŸscrm@48140000ti,dm816-scrmsimple-busH+ß ˜Hpinmux@800pinctrl-single +ßî pinmux_mcspi1_pins )”˜¨¬³pinmux_mmc_pinsH)ptx|€„ˆŒ³pinmux_usb0_pins)³!pinmux_usb1_pins)³#nandflash_pins¸)8`TXPl䤨¬°´¸¼ÀÄÈÌÐÔØÜà³syscon@600sysconsimple-bus+ ˜³usb-phy@20ti,dm8168-usb-phy =phy¬GrefclkS^³usb-phy@28ti,dm8168-usb-phy(=phy¬GrefclkS^³"clocks+secure_32k_ckŸ fixed-clocke€sys_32k_ckŸ fixed-clocke€³ tclkin_ckŸ fixed-clocke€³ sys_clkin_ckŸ fixed-clocke›üÀ³clockdomainsmain_fapllŸti,dm816-fapll-clock@¬ubƒmain_pll_clk1main_pll_clk2main_pll_clk3main_pll_clk4main_pll_clk5main_pll_clk6main_pll_clk7³ddr_fapllŸti,dm816-fapll-clock@0¬u4ƒddr_pll_clk1ddr_pll_clk2ddr_pll_clk3ddr_pll_clk4³video_fapllŸti,dm816-fapll-clockp0¬ u-ƒvideo_pll_clk1video_pll_clk2video_pll_clk3³audio_fapllŸti,dm816-fapll-clock 0 ¬uKƒaudio_pll_clk1audio_pll_clk2audio_pll_clk3audio_pll_clk4audio_pll_clk5³edma@49000000 ti,edma3Žtpcctptc0tptc1tptc2tptc3IDá@ ƒ –³elm@48080000ti,am3352-elmŽelmH ƒ³gpio@48032000ti,omap4-gpioŽgpio1¡H ƒ`³ÃÏägpio@4804c000ti,omap4-gpioŽgpio2¡HÀƒb³ÃÏä³gpmc@50000000ti,am3352-gpmcŽgpmcP +ƒdõ4úrxtxÏä³Ã˜"default0³nand@0,0ti,omap2-nand:micron,mt29f2g16aadwp  ƒ I+Rbch8bl{ž¬,¾,Ðß"ò,("06?@NR_Rp‡¡¸(Êpartition@0 âX-Loaderpartition@0x80000âU-Bootpartition@0x1c0000 âEnvironment$partition@0x280000âKernel(Ppartition@0x780000 âFilesystemxˆi2c@48028000 ti,omap4-i2cŽi2c1H€+ƒFõ:;útxrxpcf8575@20 nxp,pcf8575 ³Ãi2c@4802a000 ti,omap4-i2cŽi2c2H +ƒGõ<=útxrxpcf8575@20 nxp,pcf8575 ³Ãinterrupt-controller@48200000ti,dm816-intcÏäH ³rtc@480c0000ti,am3352-rtcti,da830-rtcH ƒKLŽrtcmailbox@480c8000ti,omap4-mailboxH € ƒMŽmailboxèô mbox_dsp  #spinbox@480ca000ti,omap4-hwspinlockH   Žspinbox.mdio@4a100800ti,davinci_mdio+J Ždavinci_mdio<B@ethernet-phy@0³ethernet-phy@1³ethernet@4a100000ti,dm816-emacŽemac0JJ 7¬^E`  š ƒ()*+³ethernet@4a120000ti,dm816-emacŽemac1J@¬^E`  š ƒ,-./³sata@4a140000ti,dm816-ahciJƒŽsata¬spi@48030000ti,omap4-mcspiH+ƒA¾Žmcspi1@õ útx0rx0tx1rx1tx2rx2tx3rx3"default0m25p80@0w25x32ÌÜl+mmc@48060000ti,omap4-hsmmcHŽmmc1ƒ@õútxrx"default0Þq ê ótimer@4802e000ti,dm816-timerHà ƒCŽtimer1ü¬Gfcktimer@48040000ti,dm816-timerH ƒDŽtimer2¬Gfcktimer@48042000ti,dm816-timerH ƒEŽtimer3timer@48044000ti,dm816-timerH@ ƒ\Žtimer4 timer@48046000ti,dm816-timerH` ƒ]Žtimer5 timer@48048000ti,dm816-timerH€ ƒ^Žtimer6 timer@4804a000ti,dm816-timerH  ƒ_Žtimer7 uart@48020000ti,am3352-uartti,omap3-uartŽuart1H eÜlƒHõútxrxuart@48022000ti,am3352-uartti,omap3-uartŽuart2H eÜlƒIõútxrxuart@48024000ti,am3352-uartti,omap3-uartŽuart3H@ eÜlƒJõútxrxusb_otg_hs@47401000ti,am33xx-usbG@@˜+ Žusb_otg_hsusb@47401000ti,musb-dm816G@G@ =mccontrolƒmc(host0? Dusb2-phyN`o ôhõ                        „úrx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15"default0!usb@47401800ti,musb-dm816G@G@ =mccontrolƒmc(host0?" Dusb2-phyN`o ôhõ                              „úrx1rx2rx3rx4rx5rx6rx7rx8rx9rx10rx11rx12rx13rx14rx15tx1tx2tx3tx4tx5tx6tx7tx8tx9tx10tx11tx12tx13tx14tx15"default0#dma-controller@47402000ti,am3359-cppi41 G@G@ G@0G@@@#=gluecontrollerschedulerqueuemgrƒglue–Œš³ wd_timer@480c2000 ti,omap3-wdt Žwd_timerH ƒmemory@80000000smemory€@À@fixedregulator0regulator-fixed ¨vmmcsd_fixed·2Z Ï2Z ³fixedclock0 fixed-clockŸeõá³ compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1serial0serial1serial2ethernet0ethernet1device_typereginterruptsti,hwmodsranges#clock-cellsclocksphandleti,bit-shiftti,max-divti,dividers#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-single,pinsreg-namesclock-names#phy-cellssysconclock-frequencyclock-indicesclock-output-names#dma-cellsti,gpio-always-ongpio-controller#gpio-cellsinterrupt-controller#interrupt-cellsdmasdma-namesgpmc,num-csgpmc,num-waitpinspinctrl-namespinctrl-0linux,mtd-namerb-gpiosti,nand-ecc-optti,elm-idnand-bus-widthgpmc,device-widthgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-on-nsgpmc,we-off-nsgpmc,oe-on-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,bus-turnaround-nsgpmc,cycle2cycle-delay-nsgpmc,clk-activation-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nslabel#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rx#hwlock-cellsbus_freqti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizephy-handleti,spi-num-csspi-max-frequencyvmmc-supplycd-gpioswp-gpiosti,timer-alwonti,timer-pwminterrupt-namesdr_modeinterface-typephysphy-namesmentor,multipointmentor,num-epsmentor,ram-bitsmentor,power#dma-channels#dma-requestsregulator-nameregulator-min-microvoltregulator-max-microvolt