=89( 9pTechnologic Systems TS-4800#!technologic,imx51-ts4800fsl,imx51chosen#,/soc/aips@70000000/serial@73fbc000memory8memoryDaliases%H/soc/aips@80000000/ethernet@83fec000!R/soc/aips@70000000/gpio@73f84000!X/soc/aips@70000000/gpio@73f88000!^/soc/aips@70000000/gpio@73f8c000!d/soc/aips@70000000/gpio@73f90000 j/soc/aips@80000000/i2c@83fc8000 o/soc/aips@80000000/i2c@83fc40000t/soc/aips@70000000/spba@70000000/esdhc@700040000y/soc/aips@70000000/spba@70000000/esdhc@700080000~/soc/aips@70000000/spba@70000000/esdhc@700200000/soc/aips@70000000/spba@70000000/esdhc@70024000#/soc/aips@70000000/serial@73fbc000#/soc/aips@70000000/serial@73fc00001/soc/aips@70000000/spba@70000000/serial@7000c0000/soc/aips@70000000/spba@70000000/ecspi@70010000"/soc/aips@80000000/ecspi@83fac000!/soc/aips@80000000/cspi@83fc0000tz-interrupt-controller@e0000000!fsl,imx51-tzicfsl,tzicD@clocksckil!fsl,imx-ckilfixed-clockckih1!fsl,imx-ckih1fixed-clockXckih2!fsl,imx-ckih2fixed-clockwosc!fsl,imx-oscfixed-clockn6cpuscpu@08cpu!arm,cortex-a8D$cpupB@ ' 5,usbphy !simple-bususbphy@0!usb-nop-xceivDK main_clk> display-subsystem!fsl,imx-display-subsystemIsoc !simple-busO`iram@1ffe0000 !mmio-sramDipu@40000000!fsl,imx51-ipuD@ g ;n= busdi0di1rport@2Dendpointyport@3Dendpointaips@70000000!fsl,aips-bussimple-busDp`spba@70000000!fsl,spba-bussimple-busDp`esdhc@70004000!fsl,imx51-esdhcDp@@g,G ipgahbperokaydefault  esdhc@70008000!fsl,imx51-esdhcDp@g-H ipgahbper disabledserial@7000c000!fsl,imx51-uartfsl,imx21-uartDp@g! !ipgperokaydefault ecspi@70010000!fsl,imx51-ecspiDp@g$34ipgper disabledssi@70014000!fsl,imx51-ssifsl,imx21-ssiDp@@g1 ipgbaud   rxtx disabledesdhc@70020000!fsl,imx51-esdhcDp@g.I ipgahbper disabledesdhc@70024000!fsl,imx51-esdhcDp@@g/J ipgahbper disabledusb@73f80000!fsl,imx51-usbfsl,imx27-usbDsgl   disabledusb@73f80200!fsl,imx51-usbfsl,imx27-usbDsgl  host disabledusb@73f80400!fsl,imx51-usbfsl,imx27-usbDsgl  host disabledusb@73f80600!fsl,imx51-usbfsl,imx27-usbDsgl  host disabledusbmisc@73f80800!fsl,imx51-usbmiscDsl gpio@73f84000!fsl,imx51-gpiofsl,imx35-gpioDs@@g23/gpio@73f88000!fsl,imx51-gpiofsl,imx35-gpioDs@g45/gpio@73f8c000!fsl,imx51-gpiofsl,imx35-gpioDs@g67/gpio@73f90000!fsl,imx51-gpiofsl,imx35-gpioDs@g89/kpp@73f94000!fsl,imx51-kppfsl,imx21-kppDs@@g< disabledwdog@73f98000!fsl,imx51-wdtfsl,imx21-wdtDs@g:wdog@73f9c000!fsl,imx51-wdtfsl,imx21-wdtDs@g; disabledtimer@73fa0000!fsl,imx51-gptfsl,imx31-gptDs@g'$)ipgperiomuxc@73fa8000!fsl,imx51-iomuxcDs@ecspi1grp`;$enablelcdgrp;esdhc1grp;@      fecgrp;h Tl \| ` d p P| L h X! 8  DL lt px t| x  t! l @i2c2grp0;l\ @p` @fpgaicgrp;lcdgrp;    $$((04,,LTPXbacklightgrp; uart1grp0;( ,uart2grp0;8( <,uart3grp0;  weimgrp;tx`dppwm@73fb4000D!fsl,imx51-pwmfsl,imx27-pwmDs@@%&ipgperg=default okaypwm@73fb8000D!fsl,imx51-pwmfsl,imx27-pwmDs@'(ipgperg^serial@73fbc000!fsl,imx51-uartfsl,imx21-uartDs@gipgperokaydefaultserial@73fc0000!fsl,imx51-uartfsl,imx21-uartDs@g ipgperokaydefaultsrc@73fd0000!fsl,imx51-srcDs@Occm@73fd4000!fsl,imx51-ccmDs@@gGHaips@80000000!fsl,aips-bussimple-busD`iim@83f98000!fsl,imx51-iimfsl,imx27-iimD@gEkowire@83fa4000 !fsl,imx51-owirefsl,imx21-owireD@@gX disabledecspi@83fac000!fsl,imx51-ecspiD@g%56ipgper disabledsdma@83fb0000!fsl,imx51-sdmafsl,imx35-sdmaD@g88ipgahb\gimx/sdma/sdma-imx51.bin cspi@83fc0000!fsl,imx51-cspifsl,imx35-cspiD@g&77ipgper disabledi2c@83fc4000!fsl,imx51-i2cfsl,imx21-i2cD@@g?#okaydefaultm41t00@68 !st,m41t00Dhi2c@83fc8000!fsl,imx51-i2cfsl,imx21-i2cD@g>" disabledssi@83fcc000!fsl,imx51-ssifsl,imx21-ssiD@g0 ipgbaud   rxtx disabledaudmux@83fd0000"!fsl,imx51-audmuxfsl,imx31-audmuxD@audmux disabledweim@83fda000!fsl,imx51-weimD9``okaydefaultfpga@0 !simple-busa  $ D`syscon@10000!sysconsimple-mfdD=wdt!technologic,ts4800-wdttouchscreen@12000!technologic,ts4800-tsD  fpga-irqc@15000!technologic,ts4800-irqcDPdefaultOg can@1a000!technologic,sja1000DOgn6nand@83fdb000!fsl,imx51-nandDg< disabledpata@83fe0000!fsl,imx51-patafsl,imx27-pataD@gF disabledssi@83fe8000!fsl,imx51-ssifsl,imx21-ssiD@g`2 ipgbaud  . /rxtx disabledethernet@83fec000!fsl,imx51-fecfsl,imx27-fecD@gW*** ipgahbptpokaydefaultmii regulator-backlight!regulator-fixeddefaultenable_lcd_reg2Z,2Z D Ibacklight!pwm-backlight \3asdisp1!fsl,imx-parallel-displayrgb24defaultdisplay-timings800x480p60P 2F22portendpointy #address-cells#size-cellsmodelcompatiblestdout-pathdevice_typeregethernet0gpio0gpio1gpio2gpio3i2c0i2c1mmc0mmc1mmc2mmc3serial0serial1serial2spi0spi1spi2interrupt-controller#interrupt-cellsphandle#clock-cellsclock-frequencyclock-latencyclocksclock-namesoperating-pointsvoltage-tolerance#phy-cellsportsinterrupt-parentrangesinterruptsresetsremote-endpointstatuspinctrl-namespinctrl-0cd-gpioswp-gpiosbus-width#sound-dai-cellsdmasdma-namesfsl,fifo-depthfsl,usbmiscfsl,usbphydr_mode#index-cellsgpio-controller#gpio-cellsfsl,pins#pwm-cells#reset-cells#dma-cellsfsl,sdma-ram-script-namefsl,weim-cs-timingreg-io-widthsysconnxp,tx-output-confignxp,external-clock-frequencyphy-modephy-reset-gpiosphy-reset-durationregulator-nameregulator-min-microvoltregulator-max-microvoltgpioenable-active-highpwmsbrightness-levelsdefault-brightness-levelpower-supplyinterface-pix-fmtnative-modehactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-len