8(%NutsBoard i.MX6 Quad Pistachio board$!nutsboard,imx6q-pistachiofsl,imx6qchosen%,/soc/aips-bus@2100000/serial@21f0000memory8memoryDaliases'H/soc/aips-bus@2100000/ethernet@2188000&R/soc/aips-bus@2000000/flexcan@2090000&W/soc/aips-bus@2000000/flexcan@2094000#\/soc/aips-bus@2000000/gpio@209c000#b/soc/aips-bus@2000000/gpio@20a0000#h/soc/aips-bus@2000000/gpio@20a4000#n/soc/aips-bus@2000000/gpio@20a8000#t/soc/aips-bus@2000000/gpio@20ac000#z/soc/aips-bus@2000000/gpio@20b0000#/soc/aips-bus@2000000/gpio@20b4000"/soc/aips-bus@2100000/i2c@21a0000"/soc/aips-bus@2100000/i2c@21a4000"/soc/aips-bus@2100000/i2c@21a8000/soc/ipu@2400000$/soc/aips-bus@2100000/usdhc@2190000$/soc/aips-bus@2100000/usdhc@2194000$/soc/aips-bus@2100000/usdhc@2198000$/soc/aips-bus@2100000/usdhc@219c0006/soc/aips-bus@2000000/spba-bus@2000000/serial@2020000%/soc/aips-bus@2100000/serial@21e8000%/soc/aips-bus@2100000/serial@21ec000%/soc/aips-bus@2100000/serial@21f0000%/soc/aips-bus@2100000/serial@21f40005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@20080005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@200c0005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@20100005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000%/soc/aips-bus@2000000/usbphy@20c9000%/soc/aips-bus@2000000/usbphy@20ca000/soc/ipu@28000005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2018000clocksckil!fsl,imx-ckilfixed-clockckih1!fsl,imx-ckih1fixed-clockosc!fsl,imx-oscfixed-clockn6tempmon!fsl,imx6q-tempmon! 21=IZldb!fsl,imx6q-ldbfsl,imx53-ldbaeokay@Z!"'()*8ldi0_plldi1_plldi0_seldi1_seldi2_seldi3_seldi0di1lvds-channel@0D edisabledport@0DendpointxIport@1DendpointxMport@2DendpointxSport@3Dendpointx Wlvds-channel@1Deokayspwgport@0Dendpointx Jport@1Dendpointx Nport@2Dendpointx Tport@3Dendpointx Xport@4Dendpointxopmu!arm,cortex-a9-pmu! 2^soc !simple-bus!dma-apbh@110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbhD 02    gpmi0gpmi1gpmi2gpmi3Zjgpmi-nand@112000!fsl,imx6q-gpmi-nandD @ gpmi-nandbch 2bch(Z0lgpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-tx edisabledhdmi@120000D 2saZ{| liahbisfreokay!fsl,imx6q-hdmiport@0DendpointxGport@1DendpointxKport@2DendpointxQport@3DendpointxUgpu@130000 !vivante,gcD@ 2 ZzJlbuscoreshaderegpu@134000 !vivante,gcD@@ 2 Zy lbuscoredtimer@a00600!arm,cortex-a9-twd-timerD  2 !Zinterrupt-controller@a01000!arm,cortex-a9-gic#D!l2-cache@a02000!arm,pl310-cacheD  2\8F R bsYpcie@1ffc000!fsl,imx6q-pciesnps,dw-pcieD@ dbiconfig8pci0 2xmsi{zyxZlpciepcie_buspcie_phy edisabledaips-bus@2000000!fsl,aips-bussimple-busDspba-bus@2000000!fsl,spba-bussimple-busDspdif@2004000!fsl,imx35-spdifD@@ 24 rxtxPZkv>:lcorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba edisabledecspi@2008000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ 2Zpplipgper rxtx edisabledecspi@200c000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ 2 Zqqlipgper rxtx edisabledecspi@2010000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ 2!Zrrlipgper rxtx edisabledecspi@2014000 !fsl,imx6q-ecspifsl,imx51-ecspiD@@ 2"Zsslipgper   rxtx edisabledserial@2020000!fsl,imx6q-uartfsl,imx21-uartD@ 2Zlipgper rxtxeokaydefaultesai@2024000!fsl,imx35-esaiD@@ 23(Zvlcorememextalfsysspba rxtx edisabledssi@2028000!fsl,imx6q-ssifsl,imx51-ssiD@ 2.Z lipgbaud %&rxtxeokaykssi@202c000!fsl,imx6q-ssifsl,imx51-ssiD@ 2/Z lipgbaud )*rxtx edisabledssi@2030000!fsl,imx6q-ssifsl,imx51-ssiD@ 20Z lipgbaud -.rxtx edisabledasrc@2034000!fsl,imx53-asrcD@@ 22Zklmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxceokayspba@203c000D@ecspi@2018000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ 2#Zttlipgper   rxtx edisabledvpu@2040000!fsl,imx6q-vpucnm,coda960D2  bitjpegZlperahb.5aipstz@207c000D@pwm@2080000:!fsl,imx6q-pwmfsl,imx27-pwmD@ 2SZ>lipgpereokaydefaultmpwm@2084000:!fsl,imx6q-pwmfsl,imx27-pwmD@@ 2TZ>lipgper edisabledpwm@2088000:!fsl,imx6q-pwmfsl,imx27-pwmD@ 2UZ>lipgper edisabledpwm@208c000:!fsl,imx6q-pwmfsl,imx27-pwmD@ 2VZ>lipgper edisabledflexcan@2090000!fsl,imx6q-flexcanD @ 2nZlmlipgper edisabledflexcan@2094000!fsl,imx6q-flexcanD @@ 2oZnolipgpereokaydefaultgpt@2098000!fsl,imx6q-gptfsl,imx31-gptD @ 27Zwxlipgperosc_pergpio@209c000!fsl,imx6q-gpiofsl,imx35-gpioD @2BCEU#a   t 1gpio@20a0000!fsl,imx6q-gpiofsl,imx35-gpioD @2DEEU#@a7#,ggpio@20a4000!fsl,imx6q-gpiofsl,imx35-gpioD @@2FGEU#0aE$-hgpio@20a8000!fsl,imx6q-gpiofsl,imx35-gpioD @2HIEU#0a~ Wgpio@20ac000!fsl,imx6q-gpiofsl,imx35-gpioD @2JKEU#PaU"5g /gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpioD @2LMEU#pa6 V6gpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpioD @@2NOEU#0a   kpp@20b8000!fsl,imx6q-kppfsl,imx21-kppD @ 2RZ> edisabledwdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdtD @ 2PZeokaywdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdtD @ 2QZ edisabledccm@20c4000!fsl,imx6q-ccmD @@2WXm!"}anatop@20c8000#!fsl,imx6q-anatopsysconsimple-busD $216regulator-1p1@20c8110D !fsl,anatop-regulatorvdd1p1B@O#6 5I\regulator-3p0@20c8120D !fsl,anatop-regulatorvdd3p0*0 #6( I3@\regulator-2p5@20c8130D 0!fsl,anatop-regulatorvdd2p5"U)00#6 I+x\regulator-vddcore@20c8140D @!fsl,anatop-regulatorvddarm  @np#6 I Zregulator-vddpu@20c8140D @!fsl,anatop-regulatorvddpu  @ np#6 I regulator-vddsoc@20c8140D @!fsl,anatop-regulatorvddsoc  @np#6 I [usbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphyD  2,Z%usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphyD  2-Z)snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfdD @snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp42snvs-poweroff!syscon-poweroff8``eokaysnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000D @ 28epit@20d4000D @@ 29src@20d8000!fsl,imx6q-srcfsl,imx51-srcD @2[`gpc@20dc000!fsl,imx6q-gpcD @#2YZ!Z>lipgpgcpower-domain@0Dpower-domain@1D0ZzJyiomuxc-gpr@20e0000'!fsl,imx6q-iomuxc-gprsysconsimple-mfdD8mux-controller !mmio-mux#86 ((  ipu1_csi0_mux !video-muxD port@0Dendpointx!9port@1Dendpointport@2Dendpointx"Eipu2_csi1_mux !video-muxD port@0Dendpointx#<port@1Dendpointport@2Dendpointx$Piomuxc@20e0000!fsl,imx6q-iomuxcD@defaulthoggrpQ4 @HLaudmuxgrp`QtD0h80l<p@08ecspi1grp`QenetgrpQ@0 Xl0\p0`t0dx0h|0t0D0pH00xL00|P0T0lX00*flexcan2grp0Qgpio_keysgrpQ,jhdmicecgrpQ i2c1grp0QxH@|L@2i2c2grp0Q@@5i2c3grp0Q,@0@7i2c1-sgtl5000grpHQ 0D03pwm1grpQ(uart1grpQP T uart2grp`Q ( $Auart3grp`Q 0 ,Buart4grp`QX\ 8h 4lCuart5grpxQ`d @p <tPYDusbotggrpQ pY(usdhc1grpQH0pYP8Y@(pY<$pYL4pYD,pYpYpYpYpY+usdhc2grpQX@pYT<YThpYL`pYPdpY\DpYPYPYX(PY-usdhc3grpQpqqpqpqpqpq0wdoggrpQ$ dcic@20e4000D@@ 2|dcic@20e8000D@ 2}sdma@20ec000!fsl,imx6q-sdmafsl,imx35-sdmaD@ 2ZlipgahbZimx/sdma/sdma-imx6q.binaips-bus@2100000!fsl,aips-bussimple-busDcaam@2100000 !fsl,sec-v4.0sD  Zlmemaclkipgemi_slowjr0@1000!fsl,sec-v4.0-job-ringD 2ijr1@2000!fsl,sec-v4.0-job-ringD  2jaipstz@217c000D@usb@2184000!fsl,imx6q-usbfsl,imx27-usbD@ 2+Z%&eokay'default(usb@2184200!fsl,imx6q-usbfsl,imx27-usbDB 2(Z)&hosteokayusb@2184400!fsl,imx6q-usbfsl,imx27-usbDD 2)Z&host edisabledusb@2184600!fsl,imx6q-usbfsl,imx27-usbDF 2*Z&host edisabledusbmisc@2184800!fsl,imx6q-usbmiscDHZ&ethernet@2188000!fsl,imx6q-fecD@ int0pps )vwZuu lipgahbptpeokaydefault*=rgmiimlb@218c000D@$25u~usdhc@2190000!fsl,imx6q-usdhcD@ 2Z lipgahbperFeokaydefault+Pf,usdhc@2194000!fsl,imx6q-usdhcD@@ 2Z lipgahbperFeokaydefault-f.rP{wlcore@2 !ti,wl1835D!/2Iusdhc@2198000!fsl,imx6q-usdhcD@ 2Z lipgahbperFeokaydefault0 1rPusdhc@219c000!fsl,imx6q-usdhcD@ 2Z lipgahbperF edisabledi2c@21a0000!fsl,imx6q-i2cfsl,imx21-i2cD@ 2$Z}eokaydefault2sgtl5000@a !fsl,sgtl5000default3D Z44li2c@21a4000!fsl,imx6q-i2cfsl,imx21-i2cD@@ 2%Z~eokaydefault5pfuze100@8 !fsl,pfuze100Dregulatorssw1ab8jsw1c8jsw2 52Zjsw3a"sw3b"sw4 52ZswbstLK@N0ivsnvsB@-vrefddrvgen1 5vgen2 5vgen3w@2Zvgen4w@2Zvgen5w@2Zvgen6w@2Zar1021@4d!microchip,ar1021-i2cDM!62i2c@21a8000!fsl,imx6q-i2cfsl,imx21-i2cD@ 2&Zeokaydefault7romcp@21ac000D@mmdc@21b0000!fsl,imx6q-mmdcD@mmdc@21b4000D@@weim@21b8000!fsl,imx6q-weimD@ 2Z edisabledocotp@21bc000!fsl,imx6q-ocotpsysconD@Ztzasc@21d0000D@ 2ltzasc@21d4000D@@ 2maudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmuxD@eokaydefault8mipi@21dc000!fsl,imx6-mipi-csi2D@2deZa ldphyrefpix edisabledport@1Dendpointx9!port@2Dendpointx:Fport@3Dendpointx;Oport@4Dendpointx<#mipi@21e0000D@ edisabledportsport@0Dendpointx=Hport@1Dendpointx>Lport@2Dendpointx?Rport@3Dendpointx@Vvdoa@21e4000!fsl,imx6q-vdoaD@@ 2Zserial@21e8000!fsl,imx6q-uartfsl,imx21-uartD@ 2Zlipgper rxtxeokaydefaultAserial@21ec000!fsl,imx6q-uartfsl,imx21-uartD@ 2Zlipgper rxtxeokaydefaultBserial@21f0000!fsl,imx6q-uartfsl,imx21-uartD@ 2Zlipgper  rxtxeokaydefaultCserial@21f4000!fsl,imx6q-uartfsl,imx21-uartD@@ 2Zlipgper !"rxtxeokaydefaultD,ipu@2400000!fsl,imx6q-ipuD@@2Z lbusdi0di1.port@0D\endpointxE"port@1D]endpointxF:port@2D`disp0-endpointhdmi-endpointxGmipi-endpointxH=lvds0-endpointxIlvds1-endpointxJ port@3Dadisp1-endpointhdmi-endpointxKmipi-endpointxL>lvds0-endpointxMlvds1-endpointxN sram@900000 !mmio-sramDZsata@2200000!fsl,imx6q-ahciD @ 2'Zilsatasata_refahbeokaygpu@2204000 !vivante,gcD @@ 2 Zy lbuscorefipu@2800000!fsl,imx6q-ipuD@2Z lbusdi0di1.port@0D^endpointxO;port@1D_endpointxP$port@2Dbdisp0-endpointhdmi-endpointxQmipi-endpointxR?lvds0-endpointxSlvds1-endpointxT port@3Dchdmi-endpointxUmipi-endpointxV@lvds0-endpointxW lvds1-endpointxX cpuscpu@0!arm,cortex-a98cpuD@Y(QOtx2   (bOtx2   {l(Zh)larmpll2_pfd2_396msteppll1_swpll1_sysZ[cpu@1!arm,cortex-a98cpuD@Ycpu@2!arm,cortex-a98cpuD@Ycpu@3!arm,cortex-a98cpuD@Ycapture-subsystem!fsl,imx-capture-subsystem\]^_display-subsystem!fsl,imx-display-subsystem`abcgpu-subsystem!fsl,imx-gpu-subsystem defregulator-3p3v!regulator-fixed3P3V2Z2Z,regulator-1p8v!regulator-fixed1P8Vw@w@4regulator-wlan_en!regulator-fixedwlan-en-regulatorw@w@ gp.regulator-usb_vbus!regulator-fixed usb_otg_vbusLK@LK@ hi'gpio-keys !gpio-keysdefaultjpower Power Button g tsound(!fsl,imx-sgtl5000fsl,imx-audio-sgtl5000audio-sgtl5000 kl8%MIC_INMic JackMic JackMic BiasHeadphone JackHP_OUT3@backlight-lvds!pwm-backlight MmP|R  !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdd^eokaynpanel!hannstar,hsd100pxn1}nportendpointxo #address-cells#size-cellsmodelcompatiblestdout-pathdevice_typeregethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1ipu1spi4#clock-cellsclock-frequencyinterrupt-parentinterruptsfsl,tempmonfsl,tempmon-dataclocksgprstatusclock-namesremote-endpointphandlefsl,data-mappingfsl,data-widthrangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namesddc-i2c-buspower-domains#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridebus-rangenum-lanesinterrupt-map-maskinterrupt-mappinctrl-namespinctrl-0uart-has-rtsctsfsl,dte-mode#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsgpio-controller#gpio-cellsgpio-rangesassigned-clocksassigned-clock-parentsregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,anatopfsl,tx-d-calregmapvalue#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,sec-erafsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydisable-over-currentsrp-disablehnp-disableadp-disabledr_mode#index-cellsinterrupts-extendedphy-modebus-widthkeep-power-in-suspendvmmc-supplyno-1-8-vnon-removablecap-power-off-cardref-clock-frequencytcxo-clock-frequencycd-gpioswakeup-sourceVDDA-supplyVDDIO-supplyregulator-boot-onregulator-ramp-delayfsl,weim-cs-gprfsl,uart-has-rtsctsnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportscoresgpiostartup-delay-usenable-active-highvin-supplylabelgpio-key,wakeuplinux,codessi-controlleraudio-codecaudio-routingmux-int-portmux-ext-portpwmsbrightness-levelsdefault-brightness-levelbacklight