8(Rex Pro i.MX6 Quad Board!rex,imx6q-rex-profsl,imx6qchosen6,/soc/aips-bus@2000000/spba-bus@2000000/serial@2020000memory8memoryDaliases'H/soc/aips-bus@2100000/ethernet@2188000&R/soc/aips-bus@2000000/flexcan@2090000&W/soc/aips-bus@2000000/flexcan@2094000#\/soc/aips-bus@2000000/gpio@209c000#b/soc/aips-bus@2000000/gpio@20a0000#h/soc/aips-bus@2000000/gpio@20a4000#n/soc/aips-bus@2000000/gpio@20a8000#t/soc/aips-bus@2000000/gpio@20ac000#z/soc/aips-bus@2000000/gpio@20b0000#/soc/aips-bus@2000000/gpio@20b4000"/soc/aips-bus@2100000/i2c@21a0000"/soc/aips-bus@2100000/i2c@21a4000"/soc/aips-bus@2100000/i2c@21a8000/soc/ipu@2400000$/soc/aips-bus@2100000/usdhc@2190000$/soc/aips-bus@2100000/usdhc@2194000$/soc/aips-bus@2100000/usdhc@2198000$/soc/aips-bus@2100000/usdhc@219c0006/soc/aips-bus@2000000/spba-bus@2000000/serial@2020000%/soc/aips-bus@2100000/serial@21e8000%/soc/aips-bus@2100000/serial@21ec000%/soc/aips-bus@2100000/serial@21f0000%/soc/aips-bus@2100000/serial@21f40005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@20080005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@200c0005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@20100005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2014000%/soc/aips-bus@2000000/usbphy@20c9000%/soc/aips-bus@2000000/usbphy@20ca000/soc/ipu@28000005/soc/aips-bus@2000000/spba-bus@2000000/ecspi@2018000clocksckil!fsl,imx-ckilfixed-clockckih1!fsl,imx-ckih1fixed-clockosc!fsl,imx-oscfixed-clockn6tempmon!fsl,imx6q-tempmon! 21=IZldb!fsl,imx6q-ldbfsl,imx53-ldba edisabled@Z!"'()*8ldi0_plldi1_plldi0_seldi1_seldi2_seldi3_seldi0di1lvds-channel@0D edisabledport@0DendpointxEport@1DendpointxIport@2DendpointxOport@3Dendpointx Slvds-channel@1D edisabledport@0Dendpointx Fport@1Dendpointx Jport@2Dendpointx Pport@3Dendpointx Tpmu!arm,cortex-a9-pmu! 2^soc !simple-bus!dma-apbh@110000&!fsl,imx6q-dma-apbhfsl,imx28-dma-apbhD 02    gpmi0gpmi1gpmi2gpmi3Zjgpmi-nand@112000!fsl,imx6q-gpmi-nandD @ gpmi-nandbch 2bch(Z0lgpmi_iogpmi_apbgpmi_bchgpmi_bch_apbper1_bchrx-tx edisabledhdmi@120000D 2saZ{| liahbisfreokay!fsl,imx6q-hdmiport@0DendpointxCport@1DendpointxGport@2DendpointxMport@3DendpointxQgpu@130000 !vivante,gcD@ 2 ZzJlbuscoreshaderagpu@134000 !vivante,gcD@@ 2 Zy lbuscore`timer@a00600!arm,cortex-a9-twd-timerD  2 !Zinterrupt-controller@a01000!arm,cortex-a9-gicD!l2-cache@a02000!arm,pl310-cacheD  2\& 2 BSUpcie@1ffc000!fsl,imx6q-pciesnps,dw-pcieD@ dbiconfig8pcig0q 2xmsi{{zyxZlpciepcie_buspcie_phy edisabledaips-bus@2000000!fsl,aips-bussimple-busDspba-bus@2000000!fsl,spba-bussimple-busDspdif@2004000!fsl,imx35-spdifD@@ 24 rxtxPZkv>:lcorerxtx0rxtx1rxtx2rxtx3rxtx4rxtx5rxtx6rxtx7spba edisabledecspi@2008000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ 2Zpplipgper rxtx edisabledecspi@200c000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ 2 Zqqlipgper rxtxeokay  defaultecspi@2010000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ 2!Zrrlipgper rxtxeokay defaultm25p80@0!sst,sst25vf032bjedec,spi-nor1-Decspi@2014000 !fsl,imx6q-ecspifsl,imx51-ecspiD@@ 2"Zsslipgper   rxtx edisabledserial@2020000!fsl,imx6q-uartfsl,imx21-uartD@ 2Zlipgper rxtxeokaydefaultesai@2024000!fsl,imx35-esaiD@@ 23(Zvlcorememextalfsysspba rxtx edisabledssi@2028000!fsl,imx6q-ssifsl,imx51-ssiD@ 2.Z lipgbaud %&rxtxeokayessi@202c000!fsl,imx6q-ssifsl,imx51-ssiD@ 2/Z lipgbaud )*rxtx edisabledssi@2030000!fsl,imx6q-ssifsl,imx51-ssiD@ 20Z lipgbaud -.rxtx edisabledasrc@2034000!fsl,imx53-asrcD@@ 22Zklmemipgasrck_0asrck_1asrck_2asrck_3asrck_4asrck_5asrck_6asrck_7asrck_8asrck_9asrck_aasrck_basrck_casrck_dasrck_easrck_fspba`rxarxbrxctxatxbtxceokayspba@203c000D@ecspi@2018000 !fsl,imx6q-ecspifsl,imx51-ecspiD@ 2#Zttlipgper   rxtx edisabledvpu@2040000!fsl,imx6q-vpucnm,coda960D2  bitjpegZlperahb aipstz@207c000D@pwm@2080000!fsl,imx6q-pwmfsl,imx27-pwmD@ 2SZ>lipgper edisabledpwm@2084000!fsl,imx6q-pwmfsl,imx27-pwmD@@ 2TZ>lipgper edisabledpwm@2088000!fsl,imx6q-pwmfsl,imx27-pwmD@ 2UZ>lipgper edisabledpwm@208c000!fsl,imx6q-pwmfsl,imx27-pwmD@ 2VZ>lipgper edisabledflexcan@2090000!fsl,imx6q-flexcanD @ 2nZlmlipgper edisabledflexcan@2094000!fsl,imx6q-flexcanD @@ 2oZnolipgper edisabledgpt@2098000!fsl,imx6q-gptfsl,imx31-gptD @ 27Zwxlipgperosc_pergpio@209c000!fsl,imx6q-gpiofsl,imx35-gpioD @2BC#3?   t /gpio@20a0000!fsl,imx6q-gpiofsl,imx35-gpioD @2DE#3@?7#,1gpio@20a4000!fsl,imx6q-gpiofsl,imx35-gpioD @@2FG#30?E$-cgpio@20a8000!fsl,imx6q-gpiofsl,imx35-gpioD @2HI#30?~ Wgpio@20ac000!fsl,imx6q-gpiofsl,imx35-gpioD @2JK#3P?U"5g gpio@20b0000!fsl,imx6q-gpiofsl,imx35-gpioD @2LM#3p?6 Vgpio@20b4000!fsl,imx6q-gpiofsl,imx35-gpioD @@2NO#30?   kpp@20b8000!fsl,imx6q-kppfsl,imx21-kppD @ 2RZ> edisabledwdog@20bc000!fsl,imx6q-wdtfsl,imx21-wdtD @ 2PZwdog@20c0000!fsl,imx6q-wdtfsl,imx21-wdtD @ 2QZ edisabledccm@20c4000!fsl,imx6q-ccmD @@2WXanatop@20c8000#!fsl,imx6q-anatopsysconsimple-busD $216regulator-1p1@20c8110D !fsl,anatop-regulatorKvdd1p1ZB@rO 5regulator-3p0@20c8120D !fsl,anatop-regulatorKvdd3p0Z*r0 ( 3@regulator-2p5@20c8130D 0!fsl,anatop-regulatorKvdd2p5Z"Ur)00 +xregulator-vddcore@20c8140D @!fsl,anatop-regulatorKvddarmZ r @%p=T  Vregulator-vddpu@20c8140D @!fsl,anatop-regulatorKvddpuZ r k@ %p=T   regulator-vddsoc@20c8140D @!fsl,anatop-regulatorKvddsocZ r @%p=T  Wusbphy@20c9000"!fsl,imx6q-usbphyfsl,imx23-usbphyD  2,Z'usbphy@20ca000"!fsl,imx6q-usbphyfsl,imx23-usbphyD  2-Z+snvs@20cc000#!fsl,sec-v4.0-monsysconsimple-mfdD @snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lp42snvs-poweroff!syscon-poweroff8`` edisabledsnvs-lpgpr!fsl,imx6q-snvs-lpgprepit@20d0000D @ 28epit@20d4000D @@ 29src@20d8000!fsl,imx6q-srcfsl,imx51-srcD @2[`gpc@20dc000!fsl,imx6q-gpcD @2YZ!Z>lipgpgcpower-domain@0Dpower-domain@1D 0ZzJyiomuxc-gpr@20e0000'!fsl,imx6q-iomuxc-gprsysconsimple-mfdD8mux-controller !mmio-mux8 (( !ipu1_csi0_mux !video-mux!port@0Dendpointx"8port@1Dendpointport@2Dendpointx#Aipu2_csi1_mux !video-mux!port@0Dendpointx$;port@1Dendpointport@2Dendpointx%Liomuxc@20e0000!fsl,imx6q-iomuxcD@default&imx6qdl-rexhoggrp 0&audmuxgrp`tD0h80l<p@07ecspi2grp`xtpecspi3grp`enetgrp@Xl0\p0`t0dx0h|0t0D0pH0xL0|P0T0lX0H<@.i2c1grp0xH@|L@3i2c2grp0@@5i2c3grp0@@6ledgrp4duart1grp0PT uart2grp08 , (@usbh1grp-usbotggrpH$ pY D*usdhc2grpX@pYT<YThpYL`pYPdpY\DpY0usdhc3grppYYpYpYpYpY2dcic@20e4000D@@ 2|dcic@20e8000D@ 2}sdma@20ec000!fsl,imx6q-sdmafsl,imx35-sdmaD@ 2Zlipgahbimx/sdma/sdma-imx6q.binaips-bus@2100000!fsl,aips-bussimple-busDcaam@2100000 !fsl,sec-v4.0D  Zlmemaclkipgemi_slowjr0@1000!fsl,sec-v4.0-job-ringD 2ijr1@2000!fsl,sec-v4.0-job-ringD  2jaipstz@217c000D@usb@2184000!fsl,imx6q-usbfsl,imx27-usbD@ 2+Z)'4(@Qeeokayy)default*usb@2184200!fsl,imx6q-usbfsl,imx27-usbDB 2(Z)+4(host@Qeeokayy,default-usb@2184400!fsl,imx6q-usbfsl,imx27-usbDD 2)Z4(host@Qe edisabledusb@2184600!fsl,imx6q-usbfsl,imx27-usbDF 2*Z4(host@Qe edisabledusbmisc@2184800!fsl,imx6q-usbmiscDHZ(ethernet@2188000!fsl,imx6q-fecD@ int0pps vwZuu lipgahbptpeokaydefault.rgmii /mlb@218c000D@$25u~usdhc@2190000!fsl,imx6q-usdhcD@ 2Z lipgahbper edisabledusdhc@2194000!fsl,imx6q-usdhcD@@ 2Z lipgahbpereokaydefault0 1 1usdhc@2198000!fsl,imx6q-usdhcD@ 2Z lipgahbpereokaydefault2 1 1usdhc@219c000!fsl,imx6q-usdhcD@ 2Z lipgahbper edisabledi2c@21a0000!fsl,imx6q-i2cfsl,imx21-i2cD@ 2$Z}eokaydefault3sgtl5000@a !fsl,sgtl5000D Z44fi2c@21a4000!fsl,imx6q-i2cfsl,imx21-i2cD@@ 2%Z~eokaydefault5eeprom@57 !at,24c02DWi2c@21a8000!fsl,imx6q-i2cfsl,imx21-i2cD@ 2&Zeokaydefault6romcp@21ac000D@mmdc@21b0000!fsl,imx6q-mmdcD@mmdc@21b4000D@@weim@21b8000!fsl,imx6q-weimD@ 2Z edisabledocotp@21bc000!fsl,imx6q-ocotpsysconD@Ztzasc@21d0000D@ 2ltzasc@21d4000D@@ 2maudmux@21d8000"!fsl,imx6q-audmuxfsl,imx31-audmuxD@eokaydefault7mipi@21dc000!fsl,imx6-mipi-csi2D@2deZa ldphyrefpix edisabledport@1Dendpointx8"port@2Dendpointx9Bport@3Dendpointx:Kport@4Dendpointx;$mipi@21e0000D@ edisabledportsport@0Dendpointx<Dport@1Dendpointx=Hport@2Dendpointx>Nport@3Dendpointx?Rvdoa@21e4000!fsl,imx6q-vdoaD@@ 2Zserial@21e8000!fsl,imx6q-uartfsl,imx21-uartD@ 2Zlipgper rxtxeokaydefault@serial@21ec000!fsl,imx6q-uartfsl,imx21-uartD@ 2Zlipgper rxtx edisabledserial@21f0000!fsl,imx6q-uartfsl,imx21-uartD@ 2Zlipgper  rxtx edisabledserial@21f4000!fsl,imx6q-uartfsl,imx21-uartD@@ 2Zlipgper !"rxtx edisabledipu@2400000!fsl,imx6q-ipuD@@2Z lbusdi0di1 port@0DXendpointxA#port@1DYendpointxB9port@2D\disp0-endpointhdmi-endpointxCmipi-endpointxD<lvds0-endpointxElvds1-endpointxF port@3D]disp1-endpointhdmi-endpointxGmipi-endpointxH=lvds0-endpointxIlvds1-endpointxJ sram@900000 !mmio-sramDZsata@2200000!fsl,imx6q-ahciD @ 2'Zilsatasata_refahbeokaygpu@2204000 !vivante,gcD @@ 2 Zy lbuscorebipu@2800000!fsl,imx6q-ipuD@2Z lbusdi0di1 port@0DZendpointxK:port@1D[endpointxL%port@2D^disp0-endpointhdmi-endpointxMmipi-endpointxN>lvds0-endpointxOlvds1-endpointxP port@3D_hdmi-endpointxQmipi-endpointxR?lvds0-endpointxS lvds1-endpointxT cpuscpu@0!arm,cortex-a98cpuD U(Otx2   (.Otx2   Gl(Zh)larmpll2_pfd2_396msteppll1_swpll1_sysUV` jWcpu@1!arm,cortex-a98cpuD Ucpu@2!arm,cortex-a98cpuD Ucpu@3!arm,cortex-a98cpuD Ucapture-subsystem!fsl,imx-capture-subsystemuXYZ[display-subsystem!fsl,imx-display-subsystemu\]^_gpu-subsystem!fsl,imx-gpu-subsystem {`abregulators !simple-busregulator@0!regulator-fixedDK3P3VZ2Zr2Z4regulator@1!regulator-fixedDdefault Kusbh1_vbusZLK@rLK@ c,regulator@2!regulator-fixedDdefault Kusb_otg_vbusZLK@rLK@ c)leds !gpio-ledsdefaultdusrusr /off heartbeatsound-!fsl,imx6-rex-sgtl5000fsl,imx-audio-sgtl5000imx6-rex-sgtl5000ef8MIC_INMic JackMic JackMic BiasHeadphone JackHP_OUT #address-cells#size-cellsmodelcompatiblestdout-pathdevice_typeregethernet0can0can1gpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2ipu0mmc0mmc1mmc2mmc3serial0serial1serial2serial3serial4spi0spi1spi2spi3usbphy0usbphy1ipu1spi4#clock-cellsclock-frequencyinterrupt-parentinterruptsfsl,tempmonfsl,tempmon-dataclocksgprstatusclock-namesremote-endpointphandlerangesinterrupt-names#dma-cellsdma-channelsreg-namesdmasdma-namesddc-i2c-buspower-domains#interrupt-cellsinterrupt-controllercache-unifiedcache-levelarm,tag-latencyarm,data-latencyarm,shared-overridebus-rangenum-lanesinterrupt-map-maskinterrupt-mapcs-gpiospinctrl-namespinctrl-0spi-max-frequency#sound-dai-cellsfsl,fifo-depthfsl,asrc-ratefsl,asrc-widthresetsiram#pwm-cellsgpio-controller#gpio-cellsgpio-rangesregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitanatop-delay-reg-offsetanatop-delay-bit-shiftanatop-delay-bit-widthregulator-enable-ramp-delayfsl,anatopregmapvalue#reset-cells#power-domain-cellspower-supply#mux-control-cellsmux-reg-masksmux-controlsfsl,pinsfsl,sdma-ram-script-namefsl,sec-erafsl,usbphyfsl,usbmiscahb-burst-configtx-burst-size-dwordrx-burst-size-dwordvbus-supplydr_mode#index-cellsinterrupts-extendedphy-modephy-reset-gpiosbus-widthcd-gpioswp-gpiosVDDA-supplyVDDIO-supplyfsl,weim-cs-gprnext-level-cacheoperating-pointsfsl,soc-operating-pointsclock-latencyarm-supplypu-supplysoc-supplyportscoresgpioenable-active-highlabeldefault-statelinux,default-triggerssi-controlleraudio-codecaudio-routingmux-int-portmux-ext-port