z8r(Ir'Boundary Devices i.MX7 Nitrogen7 Board#!boundary,imx7d-nitrogen7fsl,imx7dchosenmemory,memory8@aliases%gpio@30240000!fsl,imx7d-gpiofsl,imx35-gpio80$HIb#:gpio@30250000!fsl,imx7d-gpiofsl,imx35-gpio80%JKtgpio@30260000!fsl,imx7d-gpiofsl,imx35-gpio80&LMwdog@30280000!fsl,imx7d-wdtfsl,imx21-wdt80( NBdefault okaywdog@30290000!fsl,imx7d-wdtfsl,imx21-wdt80) O  disabledwdog@302a0000!fsl,imx7d-wdtfsl,imx21-wdt80*    disabledwdog@302b0000!fsl,imx7d-wdtfsl,imx21-wdt80+ m  disablediomuxc-lpsr@302c0000!fsl,imx7d-iomuxc-lpsr80,default#hoggrp-208} <}#backlightj9grpL}#Kpwm1grp4}#usbotg1grp0@,}D#6wdog1grp0u#gpt@302d0000!fsl,imx7d-gptfsl,imx6sx-gpt80- 7.Kipgpergpt@302e0000!fsl,imx7d-gptfsl,imx6sx-gpt80. 62Kipgper  disabledgpt@302f0000!fsl,imx7d-gptfsl,imx6sx-gpt80/ 56Kipgper  disabledgpt@30300000!fsl,imx7d-gptfsl,imx6sx-gpt800 4:Kipgper  disablediomuxc@30330000!fsl,imx7d-iomuxc803default#hoggrp-1Hl](}}#enet1grpth x$|dXqDqHqLqPqTq@q,048q<hu#@flexcan2grpH,}0}l}#(i2c1grp0L@H@#*i2c2grp0T@P@#+i2c2-rv4162grpp}#,i2c3grp0\@X@#.i2c3tsc2004grp04y }#/i2c4grp0d@`@#1j2grpH |}}p}}}}}$}P}T}X}\}`}d}x}h}t}}}$}} }(}} }}}}}}t}x}|}} }#lcdifdatgrp@88y<<y@@yDDyHHyLLyPPyTTyXXy\\y``yddyhhyllyppyttyxxy ||yyyyy y$y#lcdifctrlgrp`$y(y0y,y# pwm2grpp}#uart1grp0,y(y#$uart2grp04y0y#%uart3grpH<y8yD}#&uart6grp`lyhytypy#2usbotg2grp0@(}D#Eusdhc1grpY YYYYluu#9usdhc2grp,Y(0Y4Y8Y<YxY|Y#<usdhc3grpDY@HYLYPYTYXY\Y`YdY#?iomuxc-gpr@303400001!fsl,imx7d-iomuxc-gprfsl,imx6q-iomuxc-gprsyscon804ocotp-ctrl@30350000!fsl,imx7d-ocotpsyscon805anatop@303600004!fsl,imx7d-anatopfsl,imx6q-anatopsysconsimple-bus80613regulator-vdd1p0d@30360210806!fsl,anatop-regulator(vdd1p0d7 5OOgy 5O#snvs@30370000#!fsl,sec-v4.0-monsysconsimple-mfd807#snvs-rtc-lp!fsl,sec-v4.0-mon-rtc-lpr4snvs-poweroff!syscon-poweroffr8``snvs-powerkey!fsl,sec-v4.0-pwrkey tccm@30380000!fsl,imx7d-ccm808UV+ KckiloscUW,C#src@30390000!fsl,imx7d-srcsyscon809 YX#Ggpc@303a0000!fsl,imx7d-gpc80: W}e#pgcpgc-power-domain@1e8y#Faips-bus@30400000!fsl,aips-bussimple-bus80@@adc@30610000!fsl,imx7d-adc80a bKadc okayadc@30620000!fsl,imx7d-adc80b cKadc okayecspi@30630000 !fsl,imx7d-ecspifsl,imx51-ecspi80c "  Kipgper  disabledpwm@30660000!fsl,imx7d-pwmfsl,imx27-pwm80f QKipgper okaydefault#Mpwm@30670000!fsl,imx7d-pwmfsl,imx27-pwm80g RKipgper okaydefaultpwm@30680000!fsl,imx7d-pwmfsl,imx27-pwm80h SKipgper  disabledpwm@30690000!fsl,imx7d-pwmfsl,imx27-pwm80i TKipgper  disabledlcdif@30730000 !fsl,imx7d-lcdiffsl,imx28-lcdif80s ~~Kpixaxi okaydefault !"lcd-display#"display-timings#t_lcd_defaultÀ ((0 !+8EO##aips-bus@30800000!fsl,aips-bussimple-bus80@ecspi@30820000 !fsl,imx7d-ecspifsl,imx51-ecspi80 Kipgper  disabledecspi@30830000 !fsl,imx7d-ecspifsl,imx51-ecspi80  Kipgper  disabledecspi@30840000 !fsl,imx7d-ecspifsl,imx51-ecspi80 !Kipgper  disabledserial@30860000!fsl,imx7d-uartfsl,imx6q-uart80 Kipgper okaydefault$,serial@30890000!fsl,imx7d-uartfsl,imx6q-uart80 Kipgper okaydefault%,serial@30880000!fsl,imx7d-uartfsl,imx6q-uart80 Kipgper okaydefault&,sai@308a0000_!fsl,imx7d-saifsl,imx6sx-sai80 _ Kbusmclk1mclk2mclk3prxtx z''   disabledsai@308b0000_!fsl,imx7d-saifsl,imx6sx-sai80 ` Kbusmclk1mclk2mclk3prxtx z' '   disabledsai@308c0000_!fsl,imx7d-saifsl,imx6sx-sai80 2 Kbusmclk1mclk2mclk3prxtx z' '   disabledcan@30a00000$!fsl,imx7d-flexcanfsl,imx6q-flexcan80 nKipgper  disabledcan@30a10000$!fsl,imx7d-flexcanfsl,imx6q-flexcan80 oKipgper okaydefault()i2c@30a20000!fsl,imx7d-i2cfsl,imx21-i2c80 # okaydefault*pfuze3000@8!fsl,pfuze30008regulatorssw1a7 `Oj#sw1b7 `Ojsw27`O:sw37 O-Pswbst7LK@ON0vsnvs7B@O-vrefddrvldo17w@O2Zvldo27 5Ovccsd7+|O2Z#;v337+|O2Zvldo37w@O2Zvldo47w@O2Zi2c@30a30000!fsl,imx7d-i2cfsl,imx21-i2c80 $ okaydefault+rtc@68!microcrystal,rv4162default,8h -i2c@30a40000!fsl,imx7d-i2cfsl,imx21-i2c80 % okaydefault.touch@48 !ti,tsc20048Hdefault/ 0 0i2c@30a50000!fsl,imx7d-i2cfsl,imx21-i2c80 & okaydefault1wm8960@1a !wlf,wm89608JKmclkserial@30a60000!fsl,imx7d-uartfsl,imx6q-uart80 Kipgper  disabledserial@30a70000!fsl,imx7d-uartfsl,imx6q-uart80 Kipgper  disabledserial@30a80000!fsl,imx7d-uartfsl,imx6q-uart80 Kipgper okaydefault2, serial@30a90000!fsl,imx7d-uartfsl,imx6q-uart80 ~Kipgper  disabledusb@30b10000!fsl,imx7d-usbfsl,imx27-usb80 + 34" okay75default6usb@30b30000!fsl,imx7d-usbfsl,imx27-usb80 ( 78ChsicLhost"  disabledusbmisc@30b10200T$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc80#4usbmisc@30b30200T$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc80#8usdhc@30b40000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc80 V Kipgahbper okaydefault9 a:j;vusdhc@30b50000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc80 V Kipgahbper okaydefault<j=wlcore@2 !ti,wl12718}>Iusdhc@30b60000!!fsl,imx7d-usdhcfsl,imx6sl-usdhc80 V Kipgahbper okaydefault?Cׄvsdma@30bd0000!fsl,imx7d-sdmafsl,imx35-sdma80 ZKipgahbimx/sdma/sdma-imx7d.bin#'ethernet@30be0000!fsl,imx7d-fecfsl,imx6sx-fec80int0int1int2pps0xvwy(RR*"Kipgahbptpenet_clk_refenet_out okaydefault@,+C)rgmii2A=mdioethernet-phy@48#Ausb@30b20000!fsl,imx7d-usbfsl,imx27-usb80 * BC" okay7DdefaultELhostusbmisc@30b20200T$!fsl,imx7d-usbmiscfsl,imx6q-usbmisc80#Cethernet@30bf0000!fsl,imx7d-fecfsl,imx6sx-fec80int0int1int2pps0fdeg(RR*"Kipgahbptpenet_clk_refenet_out  disabledpcie@33800000!fsl,imx7d-pciesnps,dw-pcie83@O Ndbiconfig,pciX0O@@b zmsilz{|}r+vKpciepcie_buspcie_physw,)+FGG pciephyapps  disableddma-apbh@33000000&!fsl,imx7d-dma-apbhfsl,imx28-dma-apbh83 0    gpmi0gpmi1gpmi2gpmi3#Hgpmi-nand@33002000!fsl,imx7d-gpmi-nand83 3@@Ngpmi-nandbch bchKgpmi_iogpmi_bch_apbzHprx-tx  disabled,(etm@3007d000"!arm,coresight-etm3xarm,primecell80 VIJ Kapb_pclkportendpointbJ# usbphynop2!usb-nop-xceiv Kmain_clkW#Bbacklight-j9!gpio-backlightdefaultK Lbacklight-j20!pwm-backlightMLK@  @ okayregulator-usb-otg1-vbus!regulator-fixed(usb_otg1_vbus7LK@OLK@  L%#5regulator-usb-otg2-vbus!regulator-fixed(usb_otg2_vbus7LK@OLK@  >%#Dregulator-can2-3v3!regulator-fixed (can2-3v372ZO2Z  -#)regulator-vref-1v8!regulator-fixed (vref-1v87w@Ow@#regulator-vref-3v3!regulator-fixed (vref-3v372ZO2Z#!regulator-wlan!regulator-fixed72ZO2ZWKslow (reg_wlan8p  >%#= #address-cells#size-cellsmodelcompatibledevice_typereggpio0gpio1gpio2gpio3gpio4gpio5gpio6i2c0i2c1i2c2i2c3mmc0mmc1mmc2serial0serial1serial2serial3serial4serial5serial6spi0spi1spi2spi3fb_lcdt_lcdclock-frequencyclock-latencyclocksoperating-pointsarm-supplyphandle#clock-cellsclock-output-namesclock-names#phy-cellsremote-endpointslave-modeinterrupt-parentinterruptsrangescpu#interrupt-cellsinterrupt-controllergpio-controller#gpio-cellsgpio-rangespinctrl-namespinctrl-0statusfsl,input-selfsl,pinsregulator-nameregulator-min-microvoltregulator-max-microvoltanatop-reg-offsetanatop-vol-bit-shiftanatop-vol-bit-widthanatop-min-bit-valanatop-min-voltageanatop-max-voltageanatop-enable-bitregmapvaluemasklinux,keycodewakeup-sourceassigned-clocksassigned-clock-parentsassigned-clock-rates#reset-cells#power-domain-cellspower-supplyvref-supply#pwm-cellslcd-supplydisplaybits-per-pixelbus-widthnative-modehactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-active#sound-dai-cellsdma-namesdmasxceiver-supplyregulator-boot-onregulator-always-onregulator-ramp-delayinterrupts-extendedwakeup-gpioswlf,shared-lrclkuart-has-rtsctsfsl,usbphyfsl,usbmiscphy-clkgate-delay-usvbus-supplyphy_typedr_mode#index-cellscd-gpiosvmmc-supplyfsl,tuning-stepkeep-power-in-suspendnon-removablecap-power-off-cardref-clock-frequency#dma-cellsfsl,sdma-ram-script-nameinterrupt-namesfsl,num-tx-queuesfsl,num-rx-queuesphy-modephy-handlefsl,magic-packetreg-namesbus-rangenum-lanesinterrupt-map-maskinterrupt-mapfsl,max-link-speedpower-domainsresetsreset-namesdma-channelsarm,primecell-periphiddefault-onpwmsbrightness-levelsdefault-brightness-levelgpioenable-active-highstartup-delay-us