~8( ̐Bti,omap4-panda-esti,omap4-pandati,omap4460ti,omap4430ti,omap4 +7TI OMAP4 PandaBoard-ESchosen=/ocp/serial@48020000aliasesI/ocp/i2c@48070000N/ocp/i2c@48072000S/ocp/i2c@48060000X/ocp/i2c@48350000]/ocp/serial@4806a000e/ocp/serial@4806c000m/ocp/serial@48020000u/ocp/serial@4806e000 }/connector0 /connector17/ocp/usbhshost@4a064000/ehci@4a064c00/hub@1/usbether@1cpus+cpu@0arm,cortex-a9cpucpuW0 `O cpu@1arm,cortex-a9cpupmuarm,cortex-a9-pmu&debugss067interrupt-controller@48241000arm,cortex-a9-gic;PH$H$ l2-cache-controller@48242000arm,pl310-cacheH$ aolocal-timer@48240600arm,cortex-a9-twd-timerH$  0  interrupt-controller@48281000ti,omap4-wugen-mpu;PH( socti,omap-inframpu ti,omap4-mpu&mpu{dsp ti,omap3-c64&dspiva ti,ivahd&ivaocpti,omap4-l3-nocsimple-bus+&l3_main_1l3_main_2l3_main_3DD E0  l4@4a000000ti,omap4-l4-cfgsimple-bus+ Jcm1@4000ti,omap4-cm1simple-bus@ + @ clocks+extalt_clkin_ck fixed-clockDpad_clks_src_ck fixed-clockpad_clks_ck@108ti,gate-clockpad_slimbus_core_clks_ck fixed-clocksecure_32k_clk_src_ck fixed-clockslimbus_src_clk fixed-clockslimbus_clk@108ti,gate-clock sys_32k_ck fixed-clock0virt_12000000_ck fixed-clock7virt_13000000_ck fixed-clock]@8virt_16800000_ck fixed-clockY9virt_19200000_ck fixed-clock$:virt_26000000_ck fixed-clock;virt_27000000_ck fixed-clock<virt_38400000_ck fixed-clockI=tie_low_clock_ck fixed-clockutmi_phy_clkout_ck fixed-clockxclk60mhsp1_ck fixed-clock|xclk60mhsp2_ck fixed-clock}xclk60motg_ck fixed-clockdpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock  dpll_abe_x2_ck@1f0ti,omap4-dpll-x2-clock  dpll_abe_m2x2_ck@1f0ti,divider-clock  abe_24m_fclkfixed-factor-clock abe_clk@108ti,divider-clock dpll_abe_m3x2_ck@1f4ti,divider-clock core_hsd_byp_clk_mux_ck@12c ti,mux-clock,dpll_core_ck@120ti,omap4-dpll-core-clock $,(dpll_core_x2_ckti,omap4-dpll-x2-clockdpll_core_m6x2_ck@140ti,divider-clock@dpll_core_m2_ck@130ti,divider-clock0ddrphy_ckfixed-factor-clockdpll_core_m5x2_ck@13cti,divider-clock<div_core_ck@100ti,divider-clockdiv_iva_hs_clk@1dcti,divider-clockdiv_mpu_hs_clk@19cti,divider-clockdpll_core_m4x2_ck@138ti,divider-clock8dll_clk_div_ckfixed-factor-clockdpll_abe_m2_ck@1f0ti,divider-clock "dpll_core_m3x2_gate_ck@134 ti,composite-no-wait-gate-clock4dpll_core_m3x2_div_ck@134ti,composite-divider-clock4dpll_core_m3x2_ckti,composite-clockDdpll_core_m7x2_ck@144ti,divider-clockDiva_hsd_byp_clk_mux_ck@1ac ti,mux-clockdpll_iva_ck@1a0ti,omap4-dpll-clock'77dpll_iva_x2_ckti,omap4-dpll-x2-clockdpll_iva_m4x2_ck@1b8ti,divider-clock'7~dpll_iva_m5x2_ck@1bcti,divider-clock'7] dpll_mpu_ck@160ti,omap4-dpll-clock`dlhdpll_mpu_m2_ck@170ti,divider-clockpper_hs_clk_div_ckfixed-factor-clock#usb_hs_clk_div_ckfixed-factor-clock)l3_div_ck@100ti,divider-clock l4_div_ck@100ti,divider-clock lp_clk_div_ckfixed-factor-clock >mpu_periphclkfixed-factor-clockocp_abe_iclk@528ti,divider-clock !(Lper_abe_24m_fclkfixed-factor-clock"dummy_ck fixed-clockclockdomainsmpuss_cm@300 ti,omap4-cm+ clk@20 ti,clkctrl tesla_cm@400 ti,omap4-cm+ clk@20 ti,clkctrl abe_cm@500 ti,omap4-cm+ clk@20 ti,clkctrl l!cm2@8000ti,omap4-cm2simple-bus0+ 0clocks+per_hsd_byp_clk_mux_ck@14c ti,mux-clock#L$dpll_per_ck@140ti,omap4-dpll-clock$@DLH%dpll_per_m2_ck@150ti,divider-clock%P-dpll_per_x2_ck@150ti,omap4-dpll-x2-clock%P&dpll_per_m2x2_ck@150ti,divider-clock&P,dpll_per_m3x2_gate_ck@154 ti,composite-no-wait-gate-clock&T'dpll_per_m3x2_div_ck@154ti,composite-divider-clock&T(dpll_per_m3x2_ckti,composite-clock'(Edpll_per_m4x2_ck@158ti,divider-clock&X.dpll_per_m5x2_ck@15cti,divider-clock&\dpll_per_m6x2_ck@160ti,divider-clock&`+dpll_per_m7x2_ck@164ti,divider-clock&ddpll_usb_ck@180ti,omap4-dpll-j-type-clock)*dpll_usb_clkdcoldo_ck@1b4ti,fixed-factor-clock*Xedpll_usb_m2_ck@190ti,divider-clock*/ducati_clk_mux_ck@100 ti,mux-clock+func_12m_fclkfixed-factor-clock,func_24m_clkfixed-factor-clock-func_24mc_fclkfixed-factor-clock,func_48m_fclk@108ti,divider-clock,Lfunc_48mc_fclkfixed-factor-clock,func_64m_fclk@108ti,divider-clock.Lfunc_96m_fclk@108ti,divider-clock,Linit_60m_fclk@104ti,divider-clock/L{per_abe_nc_fclk@108ti,divider-clock"sha2md5_fck@15c8ti,gate-clock usb_phy_cm_clk32k@640ti,gate-clock0@yclockdomainsl3_init_clkdmti,clockdomain*l4_ao_cm@600 ti,omap4-cm+ clk@20 ti,clkctrl al3_1_cm@700 ti,omap4-cm+ clk@20 ti,clkctrl l3_2_cm@800 ti,omap4-cm+ clk@20 ti,clkctrl ducati_cm@900 ti,omap4-cm +  clk@20 ti,clkctrl l3_dma_cm@a00 ti,omap4-cm +  clk@20 ti,clkctrl l3_emif_cm@b00 ti,omap4-cm +  clk@20 ti,clkctrl d2d_cm@c00 ti,omap4-cm +  clk@20 ti,clkctrl l4_cfg_cm@d00 ti,omap4-cm +  clk@20 ti,clkctrl l3_instr_cm@e00 ti,omap4-cm+ clk@20 ti,clkctrl $ivahd_cm@f00 ti,omap4-cm+ clk@20 ti,clkctrl iss_cm@1000 ti,omap4-cm+ clk@20 ti,clkctrl sl3_dss_cm@1100 ti,omap4-cm+ clk@20 ti,clkctrl l3_gfx_cm@1200 ti,omap4-cm+ clk@20 ti,clkctrl l3_init_cm@1300 ti,omap4-cm+ clk@20 ti,clkctrl rl4_per_cm@1400 ti,omap4-cm+ clk@20 ti,clkctrl D^scm@2000ti,omap4-scm-coresimple-bus +  &ctrl_module_corescm_conf@0syscon+scm@100000%ti,omap4-scm-padconf-coresimple-bus+ &ctrl_module_pad_corepinmux@40 ti,omap4-padconfpinctrl-single@+sP;default12345`pinmux_twl6040_pins`fpinmux_mcpdm_pins(tpinmux_mcbsp1_pins vpinmux_dss_dpi_pins"$&(*,.0246tvxz|~1pinmux_tfp410_pinsD2pinmux_dss_hdmi_pinsZ\^3pinmux_tpd12s015_pins"HX 4pinmux_hsusbb1_pins`           5pinmux_i2c1_pinsbpinmux_i2c2_pinsjpinmux_i2c3_pinskpinmux_i2c4_pinslpinmux_wl12xx_gpio &,02pinmux_wl12xx_pins@8:  opinmux_twl6030_pins^Acgpio_led_pmxomap4_padconf_global@5a0sysconsimple-busp+ p6pbias_regulator@60ti,pbias-omap4ti,pbias-omap`6pbias_mmc_omap4pbias_mmc_omap4w@-ml4@300000ti,omap4-l4-wkupsimple-bus+ 0counter@4000ti,omap-counter32k@  &counter_32kprm@6000 ti,omap4-prm`0 0 + `0clocks+sys_clkin_ck@110 ti,mux-clock789:;<=abe_dpll_bypass_clk_mux_ck@108 ti,mux-clock0 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DEMauxclk2_src_ckti,composite-clockLMNauxclk2_ck@318ti,divider-clockNZauxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clockDOauxclk3_src_mux_ck@31cti,composite-mux-clock DEPauxclk3_src_ckti,composite-clockOPQauxclk3_ck@31cti,divider-clockQ[auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clockD Rauxclk4_src_mux_ck@320ti,composite-mux-clock DE Sauxclk4_src_ckti,composite-clockRSTauxclk4_ck@320ti,divider-clockT \auxclk5_src_gate_ck@324 ti,composite-no-wait-gate-clockD$Uauxclk5_src_mux_ck@324ti,composite-mux-clock DE$Vauxclk5_src_ckti,composite-clockUVWauxclk5_ck@324ti,divider-clockW$]auxclkreq0_ck@210 ti,mux-clockXYZ[\]auxclkreq1_ck@214 ti,mux-clockXYZ[\]auxclkreq2_ck@218 ti,mux-clockXYZ[\]auxclkreq3_ck@21c ti,mux-clockXYZ[\]auxclkreq4_ck@220 ti,mux-clockXYZ[\] auxclkreq5_ck@224 ti,mux-clockXYZ[\]$clockdomainsscm@c000ti,omap4-scm-wkup&ctrl_module_wkuppadconf@1e000%ti,omap4-scm-padconf-wkupsimple-bus+ &ctrl_module_pad_wkuppinmux@40 ti,omap4-padconfpinctrl-single@8+sP;pinmux_leds_wkpinspinmux_twl6030_wkup_pinsdocmcram@40304000 mmio-sram@0@dma-controller@4a056000ti,omap4430-sdmaJ`00  /: G &dma_system_gpio@4a310000ti,omap4-gpioJ1 0&gpio1Tfv;Pgpio@48055000ti,omap4-gpioHP 0&gpio2fv;Pqgpio@48057000ti,omap4-gpioHp 0&gpio3fv;Pgpio@48059000ti,omap4-gpioH 0 &gpio4fv;Pggpio@4805b000ti,omap4-gpioH 0!&gpio5fv;Pgpio@4805d000ti,omap4-gpioH 0"&gpio6fv;Ptarget-module@48076000ti,sysc-omap4ti,sysc &slimbus2H`H` revsysc ^fck+ H`elm@48078000ti,am3352-elmH  0&elm disabledgpmc@50000000ti,omap4430-gpmcP+ 0_rxtx&gpmc fck;Pfvserial@4806a000ti,omap4-uartH 0H&uart1lserial@4806c000ti,omap4-uartH 0I&uart2lI`serial@48020000ti,omap4-uartH 0J&uart3lJ`serial@4806e000ti,omap4-uartH 0F&uart4lF`target-module@4a0db000ti,sysc-omap4-srti,sysc&smartreflex_ivaJ 8sysc afck+ J smartreflex@0ti,omap4-smartreflex-iva 0ftarget-module@4a0dd000ti,sysc-omap4-srti,sysc&smartreflex_coreJ 8sysc afck+ J smartreflex@0ti,omap4-smartreflex-core 0target-module@4a0d9000ti,sysc-omap4-srti,sysc&smartreflex_mpuJ 8sysc afck+ J smartreflex@0ti,omap4-smartreflex-mpu 0spinlock@4a0f6000ti,omap4-hwspinlockJ` &spinlocki2c@48070000 ti,omap4-i2cH 08+&i2c1defaultbtwl@48H 0 ti,twl6030;Pdefaultcdrtcti,twl4030-rtc0 regulator-vaux1ti,twl6030-vaux1B@-regulator-vaux2ti,twl6030-vaux2O*regulator-vaux3ti,twl6030-vaux3B@-regulator-vmmcti,twl6030-vmmcO-nregulator-vppti,twl6030-vppw@&%regulator-vusimti,twl6030-vusimO,@ regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxio$regulator-vusbti,twl6030-vusberegulator-v1v8ti,twl6030-v1v8$hregulator-v2v1ti,twl6030-v2v1$iusb-comparatorti,twl6030-usb0 8epwmti,twl6030-pwmCpwmledti,twl6030-pwmledCgpadcti,twl6030-gpadc0Ntwl@4b ti,twl6040Kdefaultf 0w `gqh|iui2c@48072000 ti,omap4-i2cH  09+&i2c2defaultji2c@48060000 ti,omap4-i2cH 0=+&i2c3defaultkeeprom@50 ti,eepromPi2c@48350000 ti,omap4-i2cH5 0>+&i2c4defaultlspi@48098000ti,omap4-mcspiH  0A+&mcspi1@_#_$_%_&_'_(_)_* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap4-mcspiH  0B+&mcspi2 _+_,_-_.tx0rx0tx1rx11w@480b2000 ti,omap3-1wH  0:&hdq1wspi@480b8000ti,omap4-mcspiH  0[+&mcspi3__tx0rx0spi@480ba000ti,omap4-mcspiH  00+&mcspi4_F_Gtx0rx0mmc@4809c000ti,omap4-hsmmcH  0S&mmc1_=_>txrxmnmmc@480b4000ti,omap4-hsmmcH @ 0V&mmc2_/_0txrx disabledmmc@480ad000ti,omap4-hsmmcH  0^&mmc3_M_Ntxrx disabledmmc@480d1000ti,omap4-hsmmcH  0`&mmc4_9_:txrx disabledmmc@480d5000ti,omap4-hsmmcH P 0;&mmc5_;_<txrxdefaultop;`+wlcore@2 ti,wl1271 q0Ihsi@4a058000 ti,omap4-hsiJ@Jsysgdd&hsi rhsi_fck 0G%gdd_mpu+ J@hsi-port@2000ti,omap4-hsi-port (txrx 0Chsi-port@3000ti,omap4-hsi-port08txrx 0Dmmu@4a066000ti,omap4-iommuJ` 0&mmu_dsp5target-module@52000000ti,sysc-omap4ti,sysc&issRR revsyscBP sfck+ Rmmu@55082000ti,omap4-iommuU  0d&mmu_ipu5awdt@4a314000ti,omap4-wdtti,omap3-wdtJ1@ 0P &wd_timer2wdt@40130000ti,omap4-wdtti,omap3-wdt@I 0$ &wd_timer3mcpdm@40132000ti,omap4-mcpdm@ I mpudma 0p&mcpdm_A_Bup_linkdn_linkokaydefaulttupdmclkdmic@4012e000ti,omap4-dmic@Impudma 0r&dmic_Cup_link disabledmcbsp@40122000ti,omap4-mcbsp@ I mpudma 0%commonw&mcbsp1_!_"txrxokaydefaultvmcbsp@40124000ti,omap4-mcbsp@@I@mpudma 0%commonw&mcbsp2__txrx disabledmcbsp@40126000ti,omap4-mcbsp@`I`mpudma 0%commonw&mcbsp3__txrx disabledtarget-module@40128000ti,sysc-mcaspti,sysc&mcasp@@ revsysc ! fck+@IItarget-module@4012c000ti,sysc-omap4ti,sysc &slimbus1@@ revsysc !@fck+@IItarget-module@401f1000ti,sysc-omap4ti,sysc&aess@@ revsyscB  !fck+@IImcbsp@48096000ti,omap4-mcbspH `mpu 0%commonw&mcbsp4__ txrx disabledkeypad@4a31c000ti,omap4-keypadJ1 0xmpu&kbddmm@4e000000 ti,omap4-dmmN 0q&dmmemif@4c000000 ti,emif-4dL 0n&emif1wemif@4d000000 ti,emif-4dM 0o&emif2wocp2scp@4a0ad000ti,omap-ocp2scpJ +&ocp2scp_usb_phyusb2phy@4a0ad080 ti,omap-usb2J ЀXxywkupclkmailbox@4a0f4000ti,omap4-mailboxJ@ 0&mailboxmbox_ipu , 7mbox_dsp , 7target-module@4a10a000ti,sysc-omap4ti,sysc&fdifJJ revsysc B P sfck+ Jtimer@4a318000ti,omap3430-timerJ1 0%&timer1B z fcktimer@48032000ti,omap3430-timerH  0&&timer2timer@48034000ti,omap4430-timerH@ 0'&timer3timer@48036000ti,omap4430-timerH` 0(&timer4timer@40138000ti,omap4430-timer@I 0)&timer5Qtimer@4013a000ti,omap4430-timer@I 0*&timer6Qtimer@4013c000ti,omap4430-timer@I 0+&timer7Qtimer@4013e000ti,omap4430-timer@I 0,&timer8^Qtimer@4803e000ti,omap4430-timerH 0-&timer9^timer@48086000ti,omap3430-timerH` 0.&timer10^timer@48088000ti,omap4430-timerH 0/&timer11^usbhstll@4a062000 ti,usbhs-tllJ  0N &usb_tll_hsusbhshost@4a064000ti,usbhs-hostJ@ &usb_host_hs+ {|}3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 kehci-phyohci@4a064800ti,ohci-omap3JH 0Lvehci@4a064c00 ti,ehci-omapJL 0M~+hub@1 usb424,9514+usbether@1 usb424,ec00control-phy@4a002300ti,control-phy-usb2J#powerxcontrol-phy@4a00233cti,control-phy-otghsJ#<otghs_controlusb_otg_hs@4a0ab000ti,omap4-musbJ 0\]%mcdma &usb_otg_hs usb2-phy q2aes@4b501000 ti,omap4-aes&aes1KP 0U_o_ntxrxaes@4b701000 ti,omap4-aes&aes2Kp 0@_r_qtxrxdes@480a5000 ti,omap4-des&desH P 0R_u_ttxrxsham@4b100000ti,omap4-sham&shamK 03_wrxregulator-abb-mpu ti,abb-v2abb_mpu+2okayJ0{J0`J"h'base-addressint-addressefuse-addressxO1regulator-abb-iva ti,abb-v2abb_iva+ր2okayJ0{J0`J"h'base-addressint-addressefuse-addressx~e  target-module@56000000ti,sysc-omap4ti,sysc&gpuVV revsyscB fck+ Vdss@58000000 ti,omap4-dssXok &dss_core fck+dispc@58001000ti,omap4-dispcX 0 &dss_dispc fckencoder@58002000ti,omap4-rfbiX  disabled &dss_rfbi fckickencoder@58003000ti,omap4-vencX0 disabled &dss_venc fckencoder@58004000 ti,omap4-dsiX@XB@XC protophypll 05 disabled &dss_dsi1  fcksys_clkencoder@58005000 ti,omap4-dsiXPXR@XS protophypll 0Tok &dss_dsi2  fcksys_clkencoder@58006000ti,omap4-hdmi X`XbXcXdwppllphycore 0eok &dss_hdmi  fcksys_clk_L audio_tx'portendpoint3portendpoint3Cbandgap@4a002260J"`J#,J#xti,omap4460-bandgap 0~ NTthermal-zonescpu_thermalj\۫tripscpu_alertpassivecpu_critH criticalcooling-mapsmap0 lpddr2#Elpida,ECB240ABACNjedec,lpddr2-s4 +8DQ^mwlpddr2-timings@0jedec,lpddr2-timingszׄRFP:'LLL:|P_~@B@pplpddr2-timings@1jedec,lpddr2-timingsz RFP:''LL:|P_~@B@ppmemory@80000000memory@leds gpio-ledsdefaultheartbeat pandaboard::status1 Ng heartbeatmmc pandaboard::status2 N mmc0soundti,abe-twl6040 PandaBoardES &I 3 <u GHeadset StereophoneHSOLHeadset StereophoneHSORExt SpkHFLExt SpkHFRLine OutAUXLLine OutAUXRAFMLLine InAFMRLine Inhsusb1_power_regregulator-fixed hsusb1_vbus2Z2Z l Xp$ ihsusb1_phyusb-nop-xceiv {q [ main_clk$~wl12xx_vmmcdefaultregulator-fixedvwl1271w@w@ lq  Xppencoder0 ti,tfp410 ports+port@0endpoint3port@1endpoint3connector0dvi-connector dvi  portendpoint3encoder1 ti,tpd12s015$Nqq qports+port@0endpoint3port@1endpoint3connector1hdmi-connector hdmiaportendpoint3 compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2i2c3serial0serial1serial2serial3display0display1ethernetdevice_typenext-level-cacheregclocksclock-namesclock-latencyoperating-pointscooling-min-levelcooling-max-level#cooling-cellsphandleti,hwmodsinterruptsinterrupt-controller#interrupt-cellscache-unifiedcache-levelsramranges#clock-cellsclock-frequencyti,bit-shiftti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitclock-multclock-divti,index-power-of-twoassigned-clocksassigned-clock-ratesti,dividersti,clock-divti,clock-mult#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsti,no-reset-on-initreg-namesti,sysc-maskti,sysc-sidlestatusdmasdma-namesgpmc,num-csgpmc,num-waitpinsti,no-idle-on-initinterrupts-extended#hwlock-cellsregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,spi-num-csti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthnon-removablecap-power-off-cardref-clock-frequencyinterrupt-names#iommu-cellsti,sysc-midleti,sysc-delay-usti,iommu-bus-err-backti,buffer-sizephy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertcs1-useddevice-handlectrl-module#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-dspti,timer-pwmport1-moderemote-wakeup-connectedphysusb-phyphy-namesmultipointnum-epsram-bitsinterface-typepowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdd-supplyvdda-supplyremote-endpointdata-linesgpios#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-devicedensityio-widthtRPab-min-tcktRCD-min-tcktWR-min-tcktRASmin-min-tcktRRD-min-tcktWTR-min-tcktXP-min-tcktRTP-min-tcktCKE-min-tcktCKESR-min-tcktFAW-min-tckmin-freqmax-freqtRPabtRCDtWRtRAS-mintRRDtWTRtXPtRTPtCKESRtDQSCK-maxtFAWtZQCStZQCLtZQinittRAS-max-nstDQSCK-max-deratedlabellinux,default-triggerti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingstartup-delay-usregulator-boot-onreset-gpiosvcc-supplypowerdown-gpiosdigitalddc-i2c-bus