_80(/Cvariscite,var-stk-om44variscite,var-som-om44ti,omap4460ti,omap4 +7Variscite VAR-STK-OM44chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@48350000Q/ocp/serial@4806a000Y/ocp/serial@4806c000a/ocp/serial@48020000i/ocp/serial@4806e000 q/connectorcpus+cpu@0arm,cortex-a9zcpucpuW0 `O cpu@1arm,cortex-a9zcpupmuarm,cortex-a9-pmudebugss67interrupt-controller@48241000arm,cortex-a9-gic2H$H$ l2-cache-controller@48242000arm,pl310-cacheH$ CQlocal-timer@48240600arm,cortex-a9-twd-timerH$    interrupt-controller@48281000ti,omap4-wugen-mpu2H( socti,omap-inframpu ti,omap4-mpumpu]dsp ti,omap3-c64dspiva ti,ivahdivaocpti,omap4-l3-nocsimple-bus+bl3_main_1l3_main_2l3_main_3DD E  l4@4a000000ti,omap4-l4-cfgsimple-bus+ bJcm1@4000ti,omap4-cm1simple-bus@ + b@ clocks+extalt_clkin_cki fixed-clockvDpad_clks_src_cki fixed-clockvpad_clks_ck@108iti,gate-clockpad_slimbus_core_clks_cki fixed-clockvsecure_32k_clk_src_cki fixed-clockvslimbus_src_clki fixed-clockvslimbus_clk@108iti,gate-clock sys_32k_cki fixed-clockv0virt_12000000_cki fixed-clockv3virt_13000000_cki fixed-clockv]@4virt_16800000_cki fixed-clockvY5virt_19200000_cki fixed-clockv$6virt_26000000_cki fixed-clockv7virt_27000000_cki fixed-clockv8virt_38400000_cki fixed-clockvI9tie_low_clock_cki fixed-clockvutmi_phy_clkout_cki fixed-clockvxclk60mhsp1_cki fixed-clockvxclk60mhsp2_cki fixed-clockvxclk60motg_cki fixed-clockvdpll_abe_ck@1e0iti,omap4-dpll-m4xen-clock  dpll_abe_x2_ck@1f0iti,omap4-dpll-x2-clock  dpll_abe_m2x2_ck@1f0iti,divider-clock  abe_24m_fclkifixed-factor-clock abe_clk@108iti,divider-clock dpll_abe_m3x2_ck@1f4iti,divider-clock core_hsd_byp_clk_mux_ck@12ci ti,mux-clock,dpll_core_ck@120iti,omap4-dpll-core-clock $,(dpll_core_x2_ckiti,omap4-dpll-x2-clockdpll_core_m6x2_ck@140iti,divider-clock@dpll_core_m2_ck@130iti,divider-clock0ddrphy_ckifixed-factor-clockdpll_core_m5x2_ck@13citi,divider-clock<div_core_ck@100iti,divider-clockdiv_iva_hs_clk@1dciti,divider-clockdiv_mpu_hs_clk@19citi,divider-clockdpll_core_m4x2_ck@138iti,divider-clock8dll_clk_div_ckifixed-factor-clockdpll_abe_m2_ck@1f0iti,divider-clock "dpll_core_m3x2_gate_ck@134i ti,composite-no-wait-gate-clock4dpll_core_m3x2_div_ck@134iti,composite-divider-clock4dpll_core_m3x2_ckiti,composite-clock@dpll_core_m7x2_ck@144iti,divider-clockDiva_hsd_byp_clk_mux_ck@1aci ti,mux-clockdpll_iva_ck@1a0iti,omap4-dpll-clock 7dpll_iva_x2_ckiti,omap4-dpll-x2-clockdpll_iva_m4x2_ck@1b8iti,divider-clock ~dpll_iva_m5x2_ck@1bciti,divider-clock ] dpll_mpu_ck@160iti,omap4-dpll-clock`dlhdpll_mpu_m2_ck@170iti,divider-clockpper_hs_clk_div_ckifixed-factor-clock#usb_hs_clk_div_ckifixed-factor-clock)l3_div_ck@100iti,divider-clock l4_div_ck@100iti,divider-clock lp_clk_div_ckifixed-factor-clock :mpu_periphclkifixed-factor-clockocp_abe_iclk@528iti,divider-clock !(.per_abe_24m_fclkifixed-factor-clock"dummy_cki fixed-clockvclockdomainsmpuss_cm@300 ti,omap4-cm+ bclk@20 ti,clkctrl itesla_cm@400 ti,omap4-cm+ bclk@20 ti,clkctrl iabe_cm@500 ti,omap4-cm+ bclk@20 ti,clkctrl li!cm2@8000ti,omap4-cm2simple-bus0+ b0clocks+per_hsd_byp_clk_mux_ck@14ci ti,mux-clock#L$dpll_per_ck@140iti,omap4-dpll-clock$@DLH%dpll_per_m2_ck@150iti,divider-clock%P-dpll_per_x2_ck@150iti,omap4-dpll-x2-clock%P&dpll_per_m2x2_ck@150iti,divider-clock&P,dpll_per_m3x2_gate_ck@154i ti,composite-no-wait-gate-clock&T'dpll_per_m3x2_div_ck@154iti,composite-divider-clock&T(dpll_per_m3x2_ckiti,composite-clock'(Adpll_per_m4x2_ck@158iti,divider-clock&X.dpll_per_m5x2_ck@15citi,divider-clock&\dpll_per_m6x2_ck@160iti,divider-clock&`+dpll_per_m7x2_ck@164iti,divider-clock&ddpll_usb_ck@180iti,omap4-dpll-j-type-clock)*dpll_usb_clkdcoldo_ck@1b4iti,fixed-factor-clock*:Gdpll_usb_m2_ck@190iti,divider-clock*/ducati_clk_mux_ck@100i ti,mux-clock+func_12m_fclkifixed-factor-clock,func_24m_clkifixed-factor-clock-func_24mc_fclkifixed-factor-clock,func_48m_fclk@108iti,divider-clock,.func_48mc_fclkifixed-factor-clock,func_64m_fclk@108iti,divider-clock..func_96m_fclk@108iti,divider-clock,.init_60m_fclk@104iti,divider-clock/.per_abe_nc_fclk@108iti,divider-clock"sha2md5_fck@15c8iti,gate-clock usb_phy_cm_clk32k@640iti,gate-clock0@}clockdomainsl3_init_clkdmti,clockdomain*l4_ao_cm@600 ti,omap4-cm+ bclk@20 ti,clkctrl ial3_1_cm@700 ti,omap4-cm+ bclk@20 ti,clkctrl il3_2_cm@800 ti,omap4-cm+ bclk@20 ti,clkctrl iducati_cm@900 ti,omap4-cm + b clk@20 ti,clkctrl il3_dma_cm@a00 ti,omap4-cm + b clk@20 ti,clkctrl il3_emif_cm@b00 ti,omap4-cm + b clk@20 ti,clkctrl id2d_cm@c00 ti,omap4-cm + b clk@20 ti,clkctrl il4_cfg_cm@d00 ti,omap4-cm + b clk@20 ti,clkctrl il3_instr_cm@e00 ti,omap4-cm+ bclk@20 ti,clkctrl $iivahd_cm@f00 ti,omap4-cm+ bclk@20 ti,clkctrl iiss_cm@1000 ti,omap4-cm+ bclk@20 ti,clkctrl iyl3_dss_cm@1100 ti,omap4-cm+ bclk@20 ti,clkctrl il3_gfx_cm@1200 ti,omap4-cm+ bclk@20 ti,clkctrl il3_init_cm@1300 ti,omap4-cm+ bclk@20 ti,clkctrl ixl4_per_cm@1400 ti,omap4-cm+ bclk@20 ti,clkctrl Di\scm@2000ti,omap4-scm-coresimple-bus + b ctrl_module_corescm_conf@0syscon+scm@100000%ti,omap4-scm-padconf-coresimple-bus+ bctrl_module_pad_corepinmux@40 ti,omap4-padconfpinctrl-single@+U2ddefault1pinmux_twl6040_pins\`fpinmux_mcpdm_pins(zpinmux_tsc2004_pinsPRkpinmux_uart3_pins `pinmux_hsusbb1_pins`           1pinmux_hsusbb1_phy_rst_pinsLpinmux_i2c1_pinsbpinmux_i2c3_pinsjpinmux_mmc1_pins0qpinmux_twl6030_pins^Acpinmux_uart2_pins _pinmux_wl12xx_ctrl_pins"$&pinmux_mmc4_pins0spinmux_uart1_pins ^pinmux_mcspi1_pins npinmux_mcsasp_pinspinmux_dss_dpi_pins"$&(*,.0246tvxz|~pinmux_dss_hdmi_pinsZ\^pinmux_i2c4_pinsmpinmux_mmc5_pins8  vpinmux_gpio_led_pins>@pinmux_gpio_key_pinsbpinmux_ks8851_irq_pins<opinmux_hdmi_hpd_pinsX pinmux_backlight_pinsomap4_padconf_global@5a0sysconsimple-busp+ bp2pbias_regulator@60ti,pbias-omap4ti,pbias-omap`2pbias_mmc_omap4pbias_mmc_omap4w@-pl4@300000ti,omap4-l4-wkupsimple-bus+ b0counter@4000ti,omap-counter32k@  counter_32kprm@6000 ti,omap4-prm`0  + b`0clocks+sys_clkin_ck@110i ti,mux-clock3456789abe_dpll_bypass_clk_mux_ck@108i ti,mux-clock0 abe_dpll_refclk_mux_ck@10ci ti,mux-clock0  dbgclk_mux_ckifixed-factor-clockl4_wkup_clk_mux_ck@108i ti,mux-clock:=syc_clk_div_ck@100iti,divider-clockusim_ck@1858iti,divider-clock.X.;usim_fclk@1858iti,gate-clock;Xtrace_clk_div_ckiti,clkdm-gate-clock <?div_ts_ck@1888iti,divider-clock= . >bandgap_ts_fclk@1888iti,gate-clock>clockdomainsemu_sys_clkdmti,clockdomain?l4_wkup_cm@1800 ti,omap4-cm+ bclk@20 ti,clkctrl \i~emu_sys_cm@1a00 ti,omap4-cm+ bclk@20 ti,clkctrl i<scrm@a000ti,omap4-scrm clocks+auxclk0_src_gate_ck@310i ti,composite-no-wait-gate-clock@Bauxclk0_src_mux_ck@310iti,composite-mux-clock @ACauxclk0_src_ckiti,composite-clockBCDauxclk0_ck@310iti,divider-clockDTauxclk1_src_gate_ck@314i ti,composite-no-wait-gate-clock@Eauxclk1_src_mux_ck@314iti,composite-mux-clock @AFauxclk1_src_ckiti,composite-clockEFGauxclk1_ck@314iti,divider-clockGUauxclk2_src_gate_ck@318i ti,composite-no-wait-gate-clock@Hauxclk2_src_mux_ck@318iti,composite-mux-clock @AIauxclk2_src_ckiti,composite-clockHIJauxclk2_ck@318iti,divider-clockJVauxclk3_src_gate_ck@31ci ti,composite-no-wait-gate-clock@Kauxclk3_src_mux_ck@31citi,composite-mux-clock @ALauxclk3_src_ckiti,composite-clockKLMauxclk3_ck@31citi,divider-clockMWauxclk4_src_gate_ck@320i ti,composite-no-wait-gate-clock@ Nauxclk4_src_mux_ck@320iti,composite-mux-clock @A Oauxclk4_src_ckiti,composite-clockNOPauxclk4_ck@320iti,divider-clockP Xauxclk5_src_gate_ck@324i ti,composite-no-wait-gate-clock@$Qauxclk5_src_mux_ck@324iti,composite-mux-clock @A$Rauxclk5_src_ckiti,composite-clockQRSauxclk5_ck@324iti,divider-clockS$Yauxclkreq0_ck@210i ti,mux-clockTUVWXYauxclkreq1_ck@214i ti,mux-clockTUVWXYauxclkreq2_ck@218i ti,mux-clockTUVWXYauxclkreq3_ck@21ci ti,mux-clockTUVWXYauxclkreq4_ck@220i ti,mux-clockTUVWXY auxclkreq5_ck@224i ti,mux-clockTUVWXY$clockdomainsscm@c000ti,omap4-scm-wkupctrl_module_wkuppadconf@1e000%ti,omap4-scm-padconf-wkupsimple-bus+ bctrl_module_pad_wkuppinmux@40 ti,omap4-padconfpinctrl-single@8+U2ddefaultZ[pinmux_hsusbb1_phy_clk_pinspinmux_hsusbb1_hub_rst_pinsZpinmux_lan7500_rst_pins[pinmux_twl6030_wkup_pinsdocmcram@40304000 mmio-sram@0@dma-controller@4a056000ti,omap4430-sdmaJ`0   ) dma_system]gpio@4a310000ti,omap4-gpioJ1 gpio16HX2gpio@48055000ti,omap4-gpioHP gpio2HX2ugpio@48057000ti,omap4-gpioHp gpio3HX2gpio@48059000ti,omap4-gpioH  gpio4HX2lgpio@4805b000ti,omap4-gpioH !gpio5HX2gpio@4805d000ti,omap4-gpioH "gpio6HX2gtarget-module@48076000ti,sysc-omap4ti,sysc slimbus2H`H` drevsyscn{ \fck+ bH`elm@48078000ti,am3352-elmH  elm disabledgpmc@50000000ti,omap4430-gpmcP+ ]rxtxgpmc fck2HX disabledserial@4806a000ti,omap4-uartH Huart1vlokaydefault^serial@4806c000ti,omap4-uartH Iuart2vlokaydefault_serial@48020000ti,omap4-uartH Juart3vldefault`okayserial@4806e000ti,omap4-uartH Fuart4vl disabledtarget-module@4a0db000ti,sysc-omap4-srti,syscsmartreflex_ivaJ 8dsyscn{ afck+ bJ smartreflex@0ti,omap4-smartreflex-iva ftarget-module@4a0dd000ti,sysc-omap4-srti,syscsmartreflex_coreJ 8dsyscn{ afck+ bJ smartreflex@0ti,omap4-smartreflex-core target-module@4a0d9000ti,sysc-omap4-srti,syscsmartreflex_mpuJ 8dsyscn{ afck+ bJ smartreflex@0ti,omap4-smartreflex-mpu spinlock@4a0f6000ti,omap4-hwspinlockJ` spinlocki2c@48070000 ti,omap4-i2cH 8+i2c1defaultbokayvtwl@48H  ti,twl60302defaultcdrtcti,twl4030-rtc regulator-vaux1ti,twl6030-vaux1B@-regulator-vaux2ti,twl6030-vaux2O*regulator-vaux3ti,twl6030-vaux3B@-regulator-vmmcti,twl6030-vmmcO-rregulator-vppti,twl6030-vppw@&%regulator-vusimti,twl6030-vusim--regulator-vdacti,twl6030-vdacregulator-vanati,twl6030-vanaregulator-vcxioti,twl6030-vcxioregulator-vusbti,twl6030-vusberegulator-v1v8ti,twl6030-v1v8hregulator-v2v1ti,twl6030-v2v1iusb-comparatorti,twl6030-usb epwmti,twl6030-pwmpwmledti,twl6030-pwmledgpadcti,twl6030-gpadctwl@4b ti,twl6040iKdefaultf w g+h6iB{i2c@48072000 ti,omap4-i2cH  9+i2c2 disabledi2c@48060000 ti,omap4-i2cH =+i2c3defaultjokayvtsc2004@48 ti,tsc2004Hdefaultk l disabledtmp105@49 ti,tmp105Ieeprom@50microchip,24c32atmel,24c32Pi2c@48350000 ti,omap4-i2cH5 >+i2c4okaydefaultmvspi@48098000ti,omap4-mcspiH  A+mcspi1U@]#]$]%]&]'](])]* tx0rx0tx1rx1tx2rx2tx3rx3okaydefaultneth@0ks8851defaultocn6 g spi@4809a000ti,omap4-mcspiH  B+mcspi2U ]+],]-].tx0rx0tx1rx1 disabled1w@480b2000 ti,omap3-1wH  :hdq1wspi@480b8000ti,omap4-mcspiH  [+mcspi3U]]tx0rx0 disabledspi@480ba000ti,omap4-mcspiH  0+mcspi4U]F]Gtx0rx0 disabledmmc@4809c000ti,omap4-hsmmcH  Smmc1u]=]>txrxpdefaultqrokaymmc@480b4000ti,omap4-hsmmcH @ Vmmc2]/]0txrx disabledmmc@480ad000ti,omap4-hsmmcH  ^mmc3]M]Ntxrx disabledmmc@480d1000ti,omap4-hsmmcH  `mmc4]9]:txrxokaydefaultst+wlcore@2 ti,wl1271 u Immc@480d5000ti,omap4-hsmmcH P ;mmc5];]<txrxokaydefaultvw lhsi@4a058000 ti,omap4-hsiJ@Jdsysgddhsi xhsi_fck Ggdd_mpu+ bJ@hsi-port@2000ti,omap4-hsi-port (dtxrx Chsi-port@3000ti,omap4-hsi-port08dtxrx Dmmu@4a066000ti,omap4-iommuJ` mmu_dsp target-module@52000000ti,sysc-omap4ti,syscissRR drevsyscn{( yfck+ bRmmu@55082000ti,omap4-iommuU  dmmu_ipu 9wdt@4a314000ti,omap4-wdtti,omap3-wdtJ1@ P wd_timer2wdt@40130000ti,omap4-wdtti,omap3-wdt@I $ wd_timer3mcpdm@40132000ti,omap4-mcpdm@ I dmpudma pmcpdm]A]Bup_linkdn_linkokaydefaultz{pdmclkdmic@4012e000ti,omap4-dmic@Idmpudma rdmic]Cup_link disabledmcbsp@40122000ti,omap4-mcbsp@ I dmpudma commonOmcbsp1]!]"txrx disabledmcbsp@40124000ti,omap4-mcbsp@@I@dmpudma commonOmcbsp2]]txrx disabledmcbsp@40126000ti,omap4-mcbsp@`I`dmpudma commonOmcbsp3]]txrx disabledtarget-module@40128000ti,sysc-mcaspti,syscmcasp@@ drevsysc{ ! fck+b@IItarget-module@4012c000ti,sysc-omap4ti,sysc slimbus1@@ drevsyscn{ !@fck+b@IItarget-module@401f1000ti,sysc-omap4ti,syscaess@@ drevsysc { !fck+b@IImcbsp@48096000ti,omap4-mcbspH `dmpu commonOmcbsp4]] txrx disabledkeypad@4a31c000ti,omap4-keypadJ1 xdmpukbd disableddmm@4e000000 ti,omap4-dmmN qdmmemif@4c000000 ti,emif-4dL nemif1^g~emif@4d000000 ti,emif-4dM oemif2^g~ocp2scp@4a0ad000ti,omap-ocp2scpJ +bocp2scp_usb_phyusb2phy@4a0ad080 ti,omap-usb2J ЀX|}wkupclkmailbox@4a0f4000ti,omap4-mailboxJ@ mailboxmbox_ipu  mbox_dsp  target-module@4a10a000ti,sysc-omap4ti,syscfdifJJ drevsyscn  {( yfck+ bJtimer@4a318000ti,omap3430-timerJ1 %timer1 ~ fcktimer@48032000ti,omap3430-timerH  &timer2timer@48034000ti,omap4430-timerH@ 'timer3timer@48036000ti,omap4430-timerH` (timer4timer@40138000ti,omap4430-timer@I )timer5timer@4013a000ti,omap4430-timer@I *timer6timer@4013c000ti,omap4430-timer@I +timer7timer@4013e000ti,omap4430-timer@I ,timer8timer@4803e000ti,omap4430-timerH -timer9timer@48086000ti,omap3430-timerH` .timer10timer@48088000ti,omap4430-timerH /timer11usbhstll@4a062000 ti,usbhs-tllJ  N usb_tll_hsusbhshost@4a064000ti,usbhs-hostJ@ usb_host_hs+b 3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ,ehci-phyohci@4a064800ti,ohci-omap3JH L7ehci@4a064c00 ti,ehci-omapJL MOcontrol-phy@4a002300ti,control-phy-usb2J#dpower|control-phy@4a00233cti,control-phy-otghsJ#<dotghs_controlusb_otg_hs@4a0ab000ti,omap4-musbJ \]mcdma usb_otg_hsTO \usb2-phyfqy 22aes@4b501000 ti,omap4-aesaes1KP U]o]ntxrxaes@4b701000 ti,omap4-aesaes2Kp @]r]qtxrxdes@480a5000 ti,omap4-desdesH P R]u]ttxrxsham@4b100000ti,omap4-shamshamK 3]wrxregulator-abb-mpu ti,abb-v2abb_mpu+2okayJ0{J0`J"h'dbase-addressint-addressefuse-addressxO1regulator-abb-iva ti,abb-v2abb_iva+2okayJ0{J0`J"h'dbase-addressint-addressefuse-addressx~e  target-module@56000000ti,sysc-omap4ti,syscgpuVV drevsysc{ fck+ bVdss@58000000 ti,omap4-dssXokay dss_core fck+bdispc@58001000ti,omap4-dispcX  dss_dispc fckencoder@58002000ti,omap4-rfbiX  disabled dss_rfbi fckickencoder@58003000ti,omap4-vencX0 disabled dss_venc fckencoder@58004000 ti,omap4-dsiX@XB@XC dprotophypll 5 disabled dss_dsi1  fcksys_clkencoder@58005000 ti,omap4-dsiXPXR@XS dprotophypll T disabled dss_dsi2  fcksys_clkencoder@58006000ti,omap4-hdmi X`XbXcXddwppllphycore eokay dss_hdmi  fcksys_clk]L audio_txdefaultportendpointbandgap@4a002260J"`J#,J#xti,omap4460-bandgap ~ thermal-zonescpu_thermal%3C\۫tripscpu_alertP\passivecpu_critPH\ criticalcooling-mapsmap0g lmemory@80000000zmemory@soundti,abe-twl6040 {VAR-SOM-OM44I{LHeadset StereophoneHSOLHeadset StereophoneHSORAFMLLine InAFMRLine Inhsusb1_phyusb-nop-xceivdefault gwW main_clkv$fixedregulator-vbatregulator-fixedVBAT2Z2Zwwl12xx_vmmcdefaultregulator-fixedvwl1271w@w@ &u pBtleds gpio-ledsdefaultled0var:green:led0 g  heartbeatled1var:green:led1 g gpio-keys gpio-keysdefault+user-key@184user g connectorhdmi-connectordefaulthdmia %uportendpoint compatibleinterrupt-parent#address-cells#size-cellsmodeli2c0i2c1i2c2i2c3serial0serial1serial2serial3display0device_typenext-level-cacheregclocksclock-namesclock-latencyoperating-pointscooling-min-levelcooling-max-level#cooling-cellsphandleti,hwmodsinterruptsinterrupt-controller#interrupt-cellscache-unifiedcache-levelsramranges#clock-cellsclock-frequencyti,bit-shiftti,max-divti,autoidle-shiftti,index-starts-at-oneti,invert-autoidle-bitclock-multclock-divti,index-power-of-twoassigned-clocksassigned-clock-ratesti,dividersti,clock-divti,clock-mult#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsreg-namesti,sysc-maskti,sysc-sidlestatusdmasdma-namesgpmc,num-csgpmc,num-waitpinsti,no-idle-on-init#hwlock-cellsregulator-always-onusb-supply#pwm-cells#io-channel-cellsti,audpwron-gpiovio-supplyv2v1-supplyenable-active-highti,spi-num-csspi-max-frequencyti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthti,non-removablecap-power-off-cardref-clock-frequencycd-gpiosinterrupt-names#iommu-cellsti,sysc-midleti,sysc-delay-usti,iommu-bus-err-backti,buffer-sizephy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertctrl-module#phy-cells#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-dspti,timer-pwmport1-moderemote-wakeup-connectedphysusb-phyphy-namesmultipointnum-epsram-bitsinterface-typepowerti,tranxdone-status-maskti,settling-timeti,clock-cyclesti,abb_infovdda-supplyremote-endpoint#thermal-sensor-cellspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceti,modelti,mclk-freqti,mcpdmti,twl6040ti,audio-routingreset-gpiosvcc-supplyregulator-boot-onstartup-delay-uslabellinux,default-triggerlinux,codewakeup-sourcehpd-gpios