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%custefuse_sys_gfclk_divfixed-factor-clockdss_syc_gfclk_divfixed-factor-clock%'wkupaon_iclk_mux@108 ti,mux-clockE%Fl3instr_ts_gclk_divfixed-factor-clockFclockdomainswkupaon_cm@1900 ti,omap4-cm clk@20 ti,clkctrl \%~scrm@a000ti,omap5-scrm clocksauxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockG%Iauxclk0_src_mux_ck@310ti,composite-mux-clock GH%Jauxclk0_src_ckti,composite-clockIJ%Kauxclk0_ck@310ti,divider-clockK%Xauxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockG%Lauxclk1_src_mux_ck@314ti,composite-mux-clock GH%Mauxclk1_src_ckti,composite-clockLM%Nauxclk1_ck@314ti,divider-clockN%Yauxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clockG%Oauxclk2_src_mux_ck@318ti,composite-mux-clock GH%Pauxclk2_src_ckti,composite-clockOP%Qauxclk2_ck@318ti,divider-clockQ%Zauxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clockG%Rauxclk3_src_mux_ck@31cti,composite-mux-clock GH%Sauxclk3_src_ckti,composite-clockRS%Tauxclk3_ck@31cti,divider-clockT%[auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clockG %Uauxclk4_src_mux_ck@320ti,composite-mux-clock GH %Vauxclk4_src_ckti,composite-clockUV%Wauxclk4_ck@320ti,divider-clockW %\auxclkreq0_ck@210 ti,mux-clockXYZ[\auxclkreq1_ck@214 ti,mux-clockXYZ[\auxclkreq2_ck@218 ti,mux-clockXYZ[\auxclkreq3_ck@21c ti,mux-clockXYZ[\clockdomainspinmux@c840 ti,omap5-padconfpinctrl-single@< *default8]pinmux_palmas_sys_nirq_pinsB(%`pinmux_usbhost_wkup_pinsB%]pinmux_wlcore_irq_pinB%xocmcram@40300000 mmio-sram@0%dma-controller@4a056000ti,omap4430-sdmaJ`0  DO \ dma_system%^gpio@4ae10000ti,omap4-gpioJ gpio1i{%ygpio@48055000ti,omap4-gpioHP gpio2{gpio@48057000ti,omap4-gpioHp gpio3{%gpio@48059000ti,omap4-gpioH  gpio4{%gpio@4805b000ti,omap4-gpioH !gpio5{%kgpio@4805d000ti,omap4-gpioH "gpio6{gpio@48051000ti,omap4-gpioH #gpio7{%gpio@48053000ti,omap4-gpioH0 ygpio8{p234 gpio8_234/msecuregpmc@50000000ti,omap4430-gpmcP ^rxtxgpmc#fck{i2c@48070000 ti,omap4-i2cH 8i2c1*default8_palmas@48 ti,palmas H*default8`a%cgpioti,palmas-gpio{%bpalmas_usbti,palmas-usb-vid5L Vb%palmas_clk32k@1ti,palmas-clk32kgaudio%jrtcti,palmas-rtc&c_|gpadcti,palmas-gpadc palmas_pmicti,palmas-pmic&c short-irqd!d2dBdRdbdrddddeededdf%d5dregulatorssmps123]smps123l '`FZ%smps45]smps45l '0FZsmps6]smps6lppFZsmps7]smps7lw@w@FZ%hsmps8]smps8l '0FZsmps9]smps9l  l%ismps10_out2 ]smps10_out2lLK@LK@FZsmps10_out1 ]smps10_out1lLK@LK@%ldo1]ldo1lw@w@ldo2]ldo2l** zdisabledldo3]ldo3l``Z zdisabledldo4]ldo4lldo5]ldo5lw@w@FZldo6]ldo6lOOFZldo7]ldo7lw@w@zokay%ldo8]ldo8l--Z zdisabledldo9]ldo9lw@-Z%tldoln]ldolnlw@w@FZldousb]ldousbl1P1PFZregen3]regen3FZpalmas_power_buttonti,palmas-pwrbutton&ctwl@4b ti,twl6040K*default8g whijclk32k k%{i2c@48072000 ti,omap4-i2cH  9i2c2i2c@48060000 ti,omap4-i2cH =i2c3i2c@4807a000 ti,omap4-i2cH >i2c4*default8ltca6416@21 ti,tca6416!{%i2c@4807c000 ti,omap4-i2cH <i2c5spinlock@4a0f6000ti,omap4-hwspinlockJ` spinlockspi@48098000ti,omap4-mcspiH  Amcspi1@^#^$^%^&^'^(^)^* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap4-mcspiH  Bmcspi2 ^+^,^-^.tx0rx0tx1rx1*default8mspi@480b8000ti,omap4-mcspiH  [mcspi3^^tx0rx0*default8nspi@480ba000ti,omap4-mcspiH  0mcspi4^F^Gtx0rx0serial@4806a000ti,omap4-uartH Huart1l*default8oserial@4806c000ti,omap4-uartH Iuart2lserial@48020000ti,omap4-uartH Juart3l*default8pJqserial@4806e000ti,omap4-uartH Fuart4lserial@48066000ti,omap4-uartH` iuart5l*default8rserial@48068000ti,omap4-uartH juart6lmmc@4809c000ti,omap4-hsmmcH  Smmc1^=^>txrxs+t7mmc@480b4000ti,omap4-hsmmcH @ Vmmc2^/^0txrx+f7Ammc@480ad000ti,omap4-hsmmcH  ^mmc3^M^Ntxrx+uRv7D]*default8w^qjwlcore@2 ti,wl1271*default8x&ypmmc@480d1000ti,omap4-hsmmcH  `mmc4^9^:txrx zdisabledmmc@480d5000ti,omap4-hsmmcH P ;mmc5^;^<txrx zdisabledmmu@4a066000ti,omap4-iommuJ` mmu_dspmmu@55082000ti,omap4-iommuU  dmmu_ipukeypad@4ae1c000ti,omap4-keypadJkbdmcpdm@40132000ti,omap4-mcpdm@ I mpudma pmcpdm^A^Bup_linkdn_linkzokay*default8z{pdmclk%dmic@4012e000ti,omap4-dmic@Impudma rdmic^Cup_link zdisabledmcbsp@40122000ti,omap4-mcbsp@ I mpudma commonmcbsp1^!^"txrxzokay*default8|mcbsp@40124000ti,omap4-mcbsp@@I@mpudma commonmcbsp2^^txrxzokay*default8}mcbsp@40126000ti,omap4-mcbsp@`I`mpudma commonmcbsp3^^txrx zdisabledmailbox@4a0f4000ti,omap4-mailboxJ@ mailboxmbox_ipu  mbox_dsp  timer@4ae18000ti,omap5430-timerJ %timer1 ~ fcktimer@48032000ti,omap5430-timerH  &timer2timer@48034000ti,omap5430-timerH@ 'timer3timer@48036000ti,omap5430-timerH` (timer4timer@40138000ti,omap5430-timer@I )timer5"timer@4013a000ti,omap5430-timer@I *timer6"timer@4013c000ti,omap5430-timer@I +timer7timer@4013e000ti,omap5430-timer@I ,timer8"timer@4803e000ti,omap5430-timerH -timer9"timer@48086000ti,omap5430-timerH` .timer10"timer@48088000ti,omap5430-timerH /timer11"wdt@4ae14000ti,omap5-wdtti,omap3-wdtJ@ P wd_timer2dmm@4e000000 ti,omap5-dmmN qdmmemif@4c000000 ti,emif-4d5emif1/BL nKbwemif@4d000000 ti,emif-4d5emif2/BM oKbwomap_dwc3@4a020000ti,dwc3 usb_otg_ssJ ]dwc3@4a030000 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