8( 5x6compulab,omap5-sbc-t54compulab,omap5-cm-t54ti,omap5&7CompuLab CM-T54 on SB-T54chosenaliases=/ocp/i2c@48070000B/ocp/i2c@48072000G/ocp/i2c@48060000L/ocp/i2c@4807a000Q/ocp/i2c@4807c000V/ocp/serial@4806a000^/ocp/serial@4806c000f/ocp/serial@48020000n/ocp/serial@4806e000v/ocp/serial@48066000~/ocp/serial@48068000 /connector0 /connector1 /displaycpuscpu@0cpuarm,cortex-a15B@,`cpu"cpu@1cpuarm,cortex-a15thermal-zonescpu_thermal*@N^Atripscpu_alertkwpassive"cpu_critkHw criticalcooling-mapsmap0 gpu_thermal*@N^uPtripsgpu_critkHw criticalcore_thermal*@N^tripscore_critkHw criticaltimerarm,armv7-timer0   &pmuarm,cortex-a15-pmuinterrupt-controller@48211000arm,cortex-a15-gic@H!H! H!@ H!` &"interrupt-controller@48281000&ti,omap5-wugen-mputi,omap4-wugen-mpuH(&"socti,omap-inframpu ti,omap4-mpumpuocpti,omap5-l3-nocsimple-busl3_main_1l3_main_2l3_main_30D D0E@  l4@4a000000ti,omap5-l4-cfgsimple-bus J"scm@2000ti,omap5-scm-coresimple-bus   scm_conf@0syscon"uscm@2800%ti,omap5-scm-padconf-coresimple-bus (pinmux@40 ti,omap5-padconfpinctrl-single@ 'default5 pinmux_led_gpio_pins?p" pinmux_i2c1_pins?"^pinmux_i2c2_pins?xz"`pinmux_mmc1_pins0?"gpinmux_mmc2_pinsP?  "kpinmux_mmc3_pins0?dfhjln"mpinmux_wlan_gpios_pins?\^"npinmux_usbhost_pins0?hv" pinmux_dss_hdmi_pins?"pinmux_lcd_pins?2"pinmux_hdmi_conn_pins?"pinmux_dss_dpi_pins?"pinmux_mcspi1_pins ?"bpinmux_i2c4_pins?"apinmux_mmc1_aux_pins?46"homap5_padconf_global@5a0sysconsimple-bus " pbias_regulator@60ti,pbias-omap5ti,pbias-omap`S pbias_mmc_omap5Zpbias_mmc_omap5iw@2Z"fcm_core_aon@4000 ti,omap5-cm-core-aonsimple-bus@  @ clockspad_clks_src_ck fixed-clock" pad_clks_ck@108ti,gate-clock "*secure_32k_clk_src_ck fixed-clockslimbus_src_clk fixed-clock" slimbus_clk@108ti,gate-clock  "$sys_32k_ck fixed-clock";virt_12000000_ck fixed-clock">virt_13000000_ck fixed-clock]@"?virt_16800000_ck fixed-clockY"@virt_19200000_ck fixed-clock$"Avirt_26000000_ck fixed-clock"Bvirt_27000000_ck fixed-clock"Cvirt_38400000_ck fixed-clockI"Dxclk60mhsp1_ck fixed-clock"yxclk60mhsp2_ck fixed-clock"zdpll_abe_ck@1e0ti,omap4-dpll-m4xen-clock"dpll_abe_x2_ckti,omap4-dpll-x2-clock"dpll_abe_m2x2_ck@1f0ti,divider-clock"abe_24m_fclkfixed-factor-clock"&abe_clk@108ti,divider-clock"%abe_iclk@528ti,divider-clock(abe_lp_clk_divfixed-factor-clock"Edpll_abe_m3x2_ck@1f4ti,divider-clock"dpll_core_byp_mux@12c ti,mux-clock,"dpll_core_ck@120ti,omap4-dpll-core-clock $,("dpll_core_x2_ckti,omap4-dpll-x2-clock"dpll_core_h21x2_ck@150ti,divider-clock?P"c2c_fclkfixed-factor-clock"c2c_iclkfixed-factor-clockdpll_core_h11x2_ck@138ti,divider-clock?8dpll_core_h12x2_ck@13cti,divider-clock?<"dpll_core_h13x2_ck@140ti,divider-clock?@dpll_core_h14x2_ck@144ti,divider-clock?D"<dpll_core_h22x2_ck@154ti,divider-clock?Tdpll_core_h23x2_ck@158ti,divider-clock?Xdpll_core_h24x2_ck@15cti,divider-clock?\dpll_core_m2_ck@130ti,divider-clock0dpll_core_m3x2_ck@134ti,divider-clock4"Giva_dpll_hs_clk_divfixed-factor-clock"dpll_iva_byp_mux@1ac ti,mux-clock"dpll_iva_ck@1a0ti,omap4-dpll-clock,Ep}@"dpll_iva_x2_ckti,omap4-dpll-x2-clock"dpll_iva_h11x2_ck@1b8ti,divider-clock? ,`" dpll_iva_h12x2_ck@1bcti,divider-clock?!,$"!mpu_dpll_hs_clk_divfixed-factor-clock""dpll_mpu_ck@160ti,omap5-mpu-dpll-clock"`dlh"dpll_mpu_m2_ck@170ti,divider-clockpper_dpll_hs_clk_divfixed-factor-clock"+usb_dpll_hs_clk_divfixed-factor-clock"1l3_iclk_div@100ti,divider-clock"#gpu_l3_iclkfixed-factor-clock#l4_root_clk_div@100ti,divider-clock#slimbus1_slimbus_clk@560ti,gate-clock$ `aess_fclk@528ti,divider-clock%("mcasp_sync_mux_ck@540 ti,mux-clock &'(@")mcasp_gfclk@540 ti,mux-clock )*$@dummy_ck fixed-clockclockdomainsmpu_cm@300 ti,omap4-cm clk@20 ti,clkctrl dsp_cm@400 ti,omap4-cm clk@20 ti,clkctrl abe_cm@500 ti,omap4-cm clk@20 ti,clkctrl dcm_core@8000ti,omap5-cm-coresimple-bus0 0clocksdpll_per_byp_mux@14c ti,mux-clock+L",dpll_per_ck@140ti,omap4-dpll-clock,@DLH"-dpll_per_x2_ckti,omap4-dpll-x2-clock-".dpll_per_h11x2_ck@158ti,divider-clock.?X"4dpll_per_h12x2_ck@15cti,divider-clock.?\dpll_per_h14x2_ck@164ti,divider-clock.?d"=dpll_per_m2_ck@150ti,divider-clock-P"6dpll_per_m2x2_ck@150ti,divider-clock.P"5dpll_per_m3x2_ck@154ti,divider-clock.T"Hdpll_unipro1_ck@200ti,omap4-dpll-clock "/dpll_unipro1_clkdcoldofixed-factor-clock/"9dpll_unipro1_m2_ck@210ti,divider-clock/":dpll_unipro2_ck@1c0ti,omap4-dpll-clock"0dpll_unipro2_clkdcoldofixed-factor-clock0dpll_unipro2_m2_ck@1d0ti,divider-clock0dpll_usb_byp_mux@18c ti,mux-clock1"2dpll_usb_ck@180ti,omap4-dpll-j-type-clock2"3dpll_usb_clkdcoldofixed-factor-clock3dpll_usb_m2_ck@190ti,divider-clock3"7func_128m_clkfixed-factor-clock4func_12m_fclkfixed-factor-clock5func_24m_clkfixed-factor-clock6"(func_48m_fclkfixed-factor-clock5func_96m_fclkfixed-factor-clock5"8l3init_60m_fclk@104ti,divider-clock7"xiss_ctrlclk@1320ti,gate-clock8 lli_txphy_clk@f20ti,gate-clock9 lli_txphy_ls_clk@f20ti,gate-clock:  usb_phy_cm_clk32k@640ti,gate-clock;@"vfdif_fclk@1328ti,divider-clock4(gpu_core_gclk_mux@1520 ti,mux-clock<= gpu_hyd_gclk_mux@1520 ti,mux-clock<= hsi_fclk@1638ti,divider-clock58clockdomainsl3init_clkdmti,clockdomain3l3main1_cm@700 ti,omap4-cm clk@20 ti,clkctrl l3main2_cm@800 ti,omap4-cm clk@20 ti,clkctrl ipu_cm@900 ti,omap4-cm   clk@20 ti,clkctrl dma_cm@a00 ti,omap4-cm   clk@20 ti,clkctrl emif_cm@b00 ti,omap4-cm   clk@20 ti,clkctrl l4cfg_cm@d00 ti,omap4-cm   clk@20 ti,clkctrl l3instr_cm@e00 ti,omap4-cm clk@20 ti,clkctrl l4per_cm@1000 ti,omap4-cm clk@20 ti,clkctrl \dss_cm@1400 ti,omap4-cm clk@20 ti,clkctrl "~l3init_cm@1600 ti,omap4-cm clk@20 ti,clkctrl "wl4@4ae00000ti,omap5-l4-wkupsimple-bus Jcounter@4000ti,omap-counter32k@@ counter_32kprm@6000ti,omap5-prmsimple-bus`0   `0clockssys_clkin@110 ti,mux-clock>?@ABCD"abe_dpll_bypass_clk_mux@108 ti,mux-clock;"abe_dpll_clk_mux@10c ti,mux-clock; "custefuse_sys_gfclk_divfixed-factor-clockdss_syc_gfclk_divfixed-factor-clock"'wkupaon_iclk_mux@108 ti,mux-clockE"Fl3instr_ts_gclk_divfixed-factor-clockFclockdomainswkupaon_cm@1900 ti,omap4-cm clk@20 ti,clkctrl \"pscrm@a000ti,omap5-scrm clocksauxclk0_src_gate_ck@310 ti,composite-no-wait-gate-clockG"Iauxclk0_src_mux_ck@310ti,composite-mux-clock GH"Jauxclk0_src_ckti,composite-clockIJ"Kauxclk0_ck@310ti,divider-clockK"Xauxclk1_src_gate_ck@314 ti,composite-no-wait-gate-clockG"Lauxclk1_src_mux_ck@314ti,composite-mux-clock GH"Mauxclk1_src_ckti,composite-clockLM"Nauxclk1_ck@314ti,divider-clockN"Yauxclk2_src_gate_ck@318 ti,composite-no-wait-gate-clockG"Oauxclk2_src_mux_ck@318ti,composite-mux-clock GH"Pauxclk2_src_ckti,composite-clockOP"Qauxclk2_ck@318ti,divider-clockQ"Zauxclk3_src_gate_ck@31c ti,composite-no-wait-gate-clockG"Rauxclk3_src_mux_ck@31cti,composite-mux-clock GH"Sauxclk3_src_ckti,composite-clockRS"Tauxclk3_ck@31cti,divider-clockT"[auxclk4_src_gate_ck@320 ti,composite-no-wait-gate-clockG "Uauxclk4_src_mux_ck@320ti,composite-mux-clock GH "Vauxclk4_src_ckti,composite-clockUV"Wauxclk4_ck@320ti,divider-clockW "\auxclkreq0_ck@210 ti,mux-clockXYZ[\auxclkreq1_ck@214 ti,mux-clockXYZ[\auxclkreq2_ck@218 ti,mux-clockXYZ[\auxclkreq3_ck@21c ti,mux-clockXYZ[\clockdomainspinmux@c840 ti,omap5-padconfpinctrl-single@< pinmux_ads7846_pins?"cocmcram@40300000 mmio-sram@0"dma-controller@4a056000ti,omap4430-sdmaJ`0  AL Y dma_system"]gpio@4ae10000ti,omap4-gpioJ gpio1fx"egpio@48055000ti,omap4-gpioHP gpio2xgpio@48057000ti,omap4-gpioHp gpio3x"gpio@48059000ti,omap4-gpioH  gpio4x"gpio@4805b000ti,omap4-gpioH !gpio5xgpio@4805d000ti,omap4-gpioH "gpio6xgpio@48051000ti,omap4-gpioH #gpio7x"gpio@48053000ti,omap4-gpioH0 ygpio8x"jgpmc@50000000ti,omap4430-gpmcP ]rxtxgpmc#fckxi2c@48070000 ti,omap4-i2cH 8i2c1'default5^at24@50 atmel,24c02Ppalmas@48 ti,palmas H"_palmas_usbti,palmas-usb-vid"qrtcti,palmas-rtc&_palmas_pmicti,palmas-pmic&_ short-irq/regulatorssmps123Zsmps123i '`@T"smps45Zsmps45i '0@Tsmps6Zsmps6i``@Tsmps7Zsmps7iw@w@@Tsmps8Zsmps8i '0@Tsmps9Zsmps9i2Z2Zf@Tsmps10_out2 Zsmps10_out2iLK@LK@@Tsmps10_out1 Zsmps10_out1iLK@LK@"rldo1Zldo1iw@w@ldo2Zldo2i2Z2Zt"ldo3Zldo3i``@Tldo4Zldo4iw@w@"ldo5Zldo5iw@w@@Tldo6Zldo6iOO@Tldo7Zldo7i disabledldo8Zldo8i--@Tldo9Zldo9iw@-T"ildolnZldolniw@w@@TldousbZldousbi1P1P@Tregen3Zregen3@Ti2c@48072000 ti,omap4-i2cH  9i2c2'default5`"i2c@48060000 ti,omap4-i2cH =i2c3i2c@4807a000 ti,omap4-i2cH >i2c4'default5aat24@50 atmel,24c02Pi2c@4807c000 ti,omap4-i2cH <i2c5spinlock@4a0f6000ti,omap4-hwspinlockJ` spinlockspi@48098000ti,omap4-mcspiH  Amcspi1@]#]$]%]&]'](])]* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap4-mcspiH  Bmcspi2 ]+],]-].tx0rx0tx1rx1'default5bads7846@0'default5c ti,ads7846d`&e e& 6Fspi@480b8000ti,omap4-mcspiH  [mcspi3]]tx0rx0spi@480ba000ti,omap4-mcspiH  0mcspi4]F]Gtx0rx0serial@4806a000ti,omap4-uartH Huart1lserial@4806c000ti,omap4-uartH Iuart2lserial@48020000ti,omap4-uartH Juart3lserial@4806e000ti,omap4-uartH Fuart4lserial@48066000ti,omap4-uartH` iuart5lserial@48068000ti,omap4-uartH juart6lmmc@4809c000ti,omap4-hsmmcH  Smmc1Ta]=]>txrxxf'default5ghi j jmmc@480b4000ti,omap4-hsmmcH @ Vmmc2a]/]0txrx'default5klmmc@480ad000ti,omap4-hsmmcH  ^mmc3a]M]Ntxrx'default5mnommc@480d1000ti,omap4-hsmmcH  `mmc4a]9]:txrx disabledmmc@480d5000ti,omap4-hsmmcH P ;mmc5a];]<txrx disabledmmu@4a066000ti,omap4-iommuJ` mmu_dspmmu@55082000ti,omap4-iommuU  dmmu_ipukeypad@4ae1c000ti,omap4-keypadJkbdmcpdm@40132000ti,omap4-mcpdm@ I mpudma pmcpdm]A]Bup_linkdn_link disableddmic@4012e000ti,omap4-dmic@Impudma rdmic]Cup_link disabledmcbsp@40122000ti,omap4-mcbsp@ I mpudma commonmcbsp1]!]"txrx disabledmcbsp@40124000ti,omap4-mcbsp@@I@mpudma commonmcbsp2]]txrx disabledmcbsp@40126000ti,omap4-mcbsp@`I`mpudma commonmcbsp3]]txrx disabledmailbox@4a0f4000ti,omap4-mailboxJ@ mailbox0mbox_ipu B Mmbox_dsp B Mtimer@4ae18000ti,omap5430-timerJ %timer1X p fcktimer@48032000ti,omap5430-timerH  &timer2timer@48034000ti,omap5430-timerH@ 'timer3timer@48036000ti,omap5430-timerH` (timer4timer@40138000ti,omap5430-timer@I )timer5gttimer@4013a000ti,omap5430-timer@I *timer6gttimer@4013c000ti,omap5430-timer@I +timer7gtimer@4013e000ti,omap5430-timer@I ,timer8gttimer@4803e000ti,omap5430-timerH -timer9ttimer@48086000ti,omap5430-timerH` .timer10ttimer@48088000ti,omap5430-timerH /timer11twdt@4ae14000ti,omap5-wdtti,omap3-wdtJ@ P wd_timer2dmm@4e000000 ti,omap5-dmmN qdmmemif@4c000000 ti,emif-4d5emif1L nemif@4d000000 ti,emif-4d5emif2M oomap_dwc3@4a020000ti,dwc3 usb_otg_ssJ ]qrdwc3@4a030000 snps,dwc3J$\\]peripheralhostotgstusb2-phyusb3-phy peripheralocp2scp@4a080000ti,omap-ocp2scpJ  ocp2scp1usb2phy@4a084000 ti,omap-usb2J@|uvwwkupclkrefclk!"susb3phy@4a084400 ti,omap-usb3JDJHdJL@phy_rxphy_txpll_ctrlupvwwkupclksysclkrefclk!"tusbhstll@4a062000 ti,usbhs-tllJ  N usb_tll_hsusbhshost@4a064000ti,usbhs-hostJ@ usb_host_hs xyz3refclk_60m_intrefclk_60m_ext_p1refclk_60m_ext_p2 ,ehci-hsic 7ehci-hsicohci@4a064800ti,ohci-omap3JH LBehci@4a064c00 ti,ehci-omapJL M {|bandgap@4a0021e0 J! J#, J#,J#< ~ti,omap5430-bandgapZ"ocp2scp@4a090000ti,omap-ocp2scpJ  ocp2scp3phy@4a096000ti,phy-pipe3-sataJ `J ddJ h@phy_rxphy_txpll_ctrlutwhsysclkrefclk!"}sata@4a141100snps,dwc-ahciJJ 6} sata-phy whsatapdss@58000000 ti,omap5-dssXok dss_core ~fck'default5dispc@58001000ti,omap5-dispcX  dss_dispc ~fckencoder@58002000ti,omap5-rfbiX  disabled dss_rfbi~#fckickencoder@58004000 ti,omap5-dsiX@XB@XC@protophypll 5 disabled dss_dsi1~~  fcksys_clkencoder@58005000 ti,omap5-dsiXX@X@protophypll 7ok dss_dsi2~~  fcksys_clkencoder@58060000ti,omap5-hdmi XXXXwppllphycore eok dss_hdmi~ ~  fcksys_clk]L audio_tx'default5portendpoint "portendpoint@0"endpoint@1"regulator-abb-mpu ti,abb-v2Zabb_mpu2 J|J`J!J3base-addressint-addressefuse-addressldo-address 0 ,regulator-abb-mm ti,abb-v2Zabb_mm2 J|J`J!J3base-addressint-addressefuse-addressldo-addressۀ 0 memory@80000000memoryfixed-regulator-mmcsdregulator-fixed Zvmmcsd_fixedi2Z2Z"lfixed-regulator-vwlan-pdnregulator-fixedZvwlan_pdn_fixedi2Z2Z,  t7"fixed-regulator-vwlanregulator-fixed Zvwlan_fixedi2Z2Z, t7"oads7846-regregulator-fixed Zads7846-regi2Z2Z"dhsusb2_phyusb-nop-xceiv J !"{hsusb3_phyusb-nop-xceiv J!"|leds gpio-ledsled1 VHeartbeat  \heartbeatroffdisplay!startek,startek-kd050cpanel-dpiVlcd'default5 jpanel-timing@ ((+  portendpoint"connector0hdmi-connectorVhdmia'default5 portendpoint"encoder0 ti,tfp410portsport@0endpoint"port@1endpoint"connector1dvi-connectorVdvi ! )portendpoint" #address-cells#size-cellscompatibleinterrupt-parentmodeli2c0i2c1i2c2i2c3i2c4serial0serial1serial2serial3serial4serial5display0display1display2device_typeregoperating-pointsclocksclock-namesclock-latencycooling-min-levelcooling-max-level#cooling-cellscpu0-supplyphandlepolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresistripcooling-deviceinterruptsinterrupt-controller#interrupt-cellsti,hwmodssramranges#pinctrl-cellspinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinssysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsclock-frequencyti,bit-shiftti,max-divti,index-starts-at-oneclock-multclock-divti,index-power-of-twoti,dividersassigned-clocksassigned-clock-rates#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsdmasdma-namesgpmc,num-csgpmc,num-waitpinspagesizeti,system-power-controllerti,enable-vbus-detectionti,enable-id-detectionti,wakeupinterrupt-namesti,ldo6-vibratorregulator-always-onregulator-boot-onti,smps-rangestartup-delay-usstatus#hwlock-cellsti,spi-num-csvcc-supplyspi-max-frequencypendown-gpioti,x-minti,x-maxti,y-minti,y-maxti,x-plate-ohmsti,pressure-maxti,debounce-maxti,debounce-tolti,debounce-repwakeup-sourceti,dual-voltti,needs-special-resetpbias-supplyvmmc-supplybus-widthcd-invertedwp-invertedcd-gpioswp-gpiosti,non-removable#iommu-cellsti,iommu-bus-err-backreg-namesti,buffer-size#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,timer-alwonti,timer-dspti,timer-pwmti,no-idle-on-initphy-typehw-caps-read-idle-ctrlhw-caps-ll-interfacehw-caps-temp-alertutmi-modeextconvbus-supplyphysphy-namesdr_modesyscon-phy-power#phy-cellsport2-modeport3-moderemote-wakeup-connected#thermal-sensor-cellsports-implementedvdd-supplyvdda-supplyremote-endpointlanesdata-linesti,settling-timeti,clock-cyclesti,tranxdone-status-maskti,ldovbb-override-maskti,ldovbb-vset-maskti,abb_infovin-supplyenable-active-highreset-gpioslabellinux,default-triggerdefault-stateenable-gpioshactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activehpd-gpiosdigitalddc-i2c-bus