8~p(~8Asus Nexus7(flo)!asus,nexus7-floqcom,apq8064,chosen=serial0:115200n8aliases#I/soc/gsbi@16600000/serial@16640000#Q/soc/gsbi@16500000/serial@16540000memoryYmemoryereserved-memoryismem@80000000e pwwcnss@8f000000eppwRramoops@88d00000!ramoopsecpuscpu@0 !qcom,kraitqcom,kpss-acc-v1Ycpuewdcpu@1 !qcom,kraitqcom,kpss-acc-v1Ycpuewfcpu@2 !qcom,kraitqcom,kpss-acc-v1Ycpue whcpu@3 !qcom,kraitqcom,kpss-acc-v1Ycpue  wjl2-cache!cachewidle-statesspc#!qcom,idle-state-spcarm,idle-state wthermal-zonescpu-thermal0#9G Wtripstrip0d$p`passivetrip1dp `criticalcpu-thermal1#9G Wltripstrip0d$p`passivetrip1dp `criticalcpu-thermal2#9G Wtripstrip0d$p`passivetrip1dp `criticalcpu-thermal3#9G Wltripstrip0d$p`passivetrip1dp `criticalcpu-pmu!qcom,krait-pmu { clockscxo_board !fixed-clock$w.pxo_board !fixed-clocksleep_clk !fixed-clockw-hwmutex!qcom,sfpb-mutex  wsmem !qcom,smemsmd !qcom,smdmodem@0 {%  disabledq6@1 {Z  disableddsps@3 { @ disabledriva@6 {  disabledsmsm !qcom,smsm     @apps@0ewYmodem@1e {&/Dq6@2e {Y/Dwcnss@3e {/DwQdsps@4e {/Dfirmwarescm!qcom,scm-apq8064U \coresoci !simple-buspinctrl@800000!qcom,apq8064-pinctrle@hx/D {defaultwsdc4-gpiosw<pios*gpio63gpio64gpio65gpio66gpio67gpio68sdc4sdcc1-pin-activew7clk sdc1_clkcmd sdc1_cmd data sdc1_data sdcc3-pin-activeclk sdc3_clkcmd sdc3_cmddata sdc3_dataps_holdwmuxgpio78ps_holdi2c1wmuxgpio20gpio21gsbi1pinconfgpio20gpio21i2c1_pins_sleepwmuxgpio20gpio21gpiopinconfgpio20gpio21gsbi1_uart_2pinsmuxgpio18gpio19gsbi1gsbi1_uart_4pinsmuxgpio18gpio19gpio20gpio21gsbi1i2c2wmuxgpio24gpio25gsbi2pinconfgpio24gpio25i2c2_pins_sleepwmuxgpio24gpio25gpiopinconfgpio24gpio25i2c3wmux gpio8gpio9gsbi3pinconf gpio8gpio9i2c3_pins_sleepwmux gpio8gpio9gpiopinconf gpio8gpio9i2c4wmuxgpio12gpio13gsbi4pinconfgpio12gpio13i2c4_pins_sleepwmuxgpio12gpio13gpiopinconfgpio12gpio13spi5_defaultwpinmuxgpio51gpio52gpio54gsbi5pinmux_csgpiogpio53pinconfgpio51gpio52gpio54pinconf_csgpio53spi5_sleepwpinmuxgpiogpio51gpio52gpio53gpio54pinconfgpio51gpio52gpio53gpio54i2c6w!muxgpio16gpio17gsbi6pinconfgpio16gpio17i2c6_pins_sleepw"muxgpio16gpio17gpiopinconfgpio16gpio17gsbi6_uart_2pinsmuxgpio14gpio15gsbi6gsbi6_uart_4pinsw muxgpio14gpio15gpio16gpio17gsbi6gsbi7_uart_2pinsmuxgpio82gpio83gsbi7gsbi7_uart_4pinsmuxgpio82gpio83gpio84gpio85gsbi7i2c7w#muxgpio84gpio85gsbi7pinconfgpio84gpio85i2c7_pins_sleepw$muxgpio84gpio85gpiopinconfgpio84gpio85riva-fm-activegpio14gpio15riva_fmriva-bt-activegpio16gpio17riva_btriva-wlan-active#gpio64gpio65gpio66gpio67gpio68 riva_wlanhdmi-pinctrlwLmuxgpio70gpio71gpio72hdmipinconf_ddcgpio70gpio71pinconf_hpdgpio72syscon@1200000!syscone w interrupt-controller@2000000!qcom,msm-qgic2/De wtimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer${eclock-controller@2088000!qcom,kpss-acc-v1ewclock-controller@2098000!qcom,kpss-acc-v1e wclock-controller@20a8000!qcom,kpss-acc-v1e wclock-controller@20b8000!qcom,kpss-acc-v1e w power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2ewpower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2e wpower-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2e w power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2e w sps-sic-non-secure@12100000!sysconewgsbi@12440000okay!qcom,gsbi-v1.0.0eDU \ifacei(serial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmeE@ {U  \coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.12defaulteF {U  \coreifaceokay @eeprom@52 !atmel,24c128eR< bq27541@55 !ti,bq27541eUgsbi@12480000 disabled!qcom,gsbi-v1.0.0eHU \ifaceii2c@124a0000!qcom,i2c-qup-v1.1.1eJ2defaultsleep {U  \coreifacegsbi@16200000okay!qcom,gsbi-v1.0.0e U \ifacei(i2c@16280000!qcom,i2c-qup-v1.1.12defaulte( {U  \coreifaceokay @trackpad@10!elan,ekth3500e,{gsbi@16300000 disabled!qcom,gsbi-v1.0.0e0U \ifaceii2c@16380000!qcom,i2c-qup-v1.1.12defaultsleepe8 {U  \coreifacegsbi@1a200000 disabled!qcom,gsbi-v1.0.0e U \ifaceiserial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdme$  {U  \coreiface disabledspi@1a280000!qcom,spi-qup-v1.1.1e( {2defaultsleepU  \coreiface disabledgsbi@16500000ok!qcom,gsbi-v1.0.0ePU \ifacei(serial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmeTP {U  \coreifaceokdefault i2c@16580000!qcom,i2c-qup-v1.1.1!2"defaultsleepeX {U  \coreiface disabledgsbi@16600000ok!qcom,gsbi-v1.0.0e`U \ifacei(serial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdmed` {U  \coreifaceoki2c@16680000!qcom,i2c-qup-v1.1.1#2$defaultsleepeh {U  \coreiface disabledrng@1a500000 !qcom,prngePU \coressbi@c00000 !qcom,ssbie Epmic-arbiterpmic@1 !qcom,pm8821,{LD/mpps@50!qcom,pm8821-mppqcom,ssbi-mppeP {hxqcom,ssbi@500000 !qcom,ssbieP Epmic-arbiterpmic@0 !qcom,pm8921,{JD/w%gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpioeP`{hxwJmpps@50!qcom,pm8921-mppqcom,ssbi-mppePhx`{rtc@11d!qcom,pm8921-rtc,%{'eZpwrkey@1c!qcom,pm8921-pwrkeye,%{23i= qfprom@700000 !qcom,qfpromepicalibew&backup_calibew'clock-controller@900000!qcom,gcc-apq8064e@r&'~calibcalib_backupw clock-controller@28000000!qcom,lcc-apq8064e(clock-controller@4000000!qcom,mmcc-apq8064ew=clock-controller@2011000!sysconewrpm@108000!qcom,rpm-apq8064e ${ackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccwregulators!qcom,rpm-pm8921-regulators((())!)1*@*O*^+s1m((0w)s2wUs3 0I>wSs4w@w@0mw(s7  0w*s8l1l2OOmwBl3..w0l4w@w@w1l5-p-pmw9l6-p-pw+l7l8wCl9l10wVl11--mwEl12l14l15l16l17--mwIl18l21l22l23w@w@l24wTl25l26l27l28l29lvs1lvs2wWlvs3lvs4lvs5lvs6lvs7wDusb-switchhdmi-switchncpusb@12500000 !qcom,ci-hdrcePP {dU ~ \coreiface  @coreulpi ,#usb-phyokay-otgw/ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phyU-. \sleepref/por5@0L1w,usb@12520000 !qcom,ci-hdrceRR {U ) ' \coreiface ) dcoreulpi 2#usb-phy disabledw3ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy5U-. \sleepref3porw2usb@12530000 !qcom,ci-hdrceSS {U , * \coreiface , ecoreulpi 4#usb-phy disabledw5ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy5U-. \sleepref5porw4phy@1b400000!qcom,apq8064-sata-phy disablede@Xphy_memU -\cfg5w6sata@29000000!qcom,apq8064-ahcigeneric-ahci disablede) {(U ; . )\slave_ifaceifacebusrxoobcore_pmalive 6 #sata-phybdma@12402000!qcom,bam-v1.3.0e@  {bU n\bam_clktw8dma@12182000!qcom,bam-v1.3.0e  {`U p\bam_clktw:dma@121c2000!qcom,bam-v1.3.0e  {_U q\bam_clktw;amba !simple-busisdcc@12400000okay!arm,pl18xarm,primecelldefault7e@  {hcmd_irqU x n\mclkapb_pclk88txrx9(sdcc@12180000!arm,pl18xarm,primecell disablede  {fcmd_irqU z p\mclkapb_pclk q::txrxsdcc@121c0000!arm,pl18xarm,primecell disablede  {ecmd_irqU { q\mclkapb_pclkl;;txrxdefault<syscon@1a400000!qcom,tcsr-apq8064syscone@wadreno-3xx@4300000!qcom,adreno-3xxe0Xkgsl_3d0_reg_memory {P kgsl_3d0_irq)\core_clkiface_clkmem_clkmem_iface_clk U=G==!=$>>>>>>>>>> > > > > >>>>>>>>>>>>>>>>>>?????????? ? ? ? ? ??????????????????qcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0+tqcom,gpu-pwrlevel@1+syscon@5700000!sysconeppwAmdss_dsi@4700000!qcom,mdss-dsi-ctrl9MDSS DSI CTRL->0 {Rep Xdsi_ctrl8U====9=T=j=XD\iface_clkbus_clkcore_mmss_clksrc_clkbyte_clkpixel_clkcore_clk =S=W=8=i ?@@@@VA@okaybBnCyDEFportsport@0eendpointGwPport@1eendpointHwKpanel@0e!jdi,lt070me05000ID J$ 6 JportendpointKwHdsi-phy@4700200!qcom,dsi-phy-28nm-89605eppp\"Xdsi_plldsi_phydsi_phy_regulator \iface_clkU=okayyDw@iommu@7500000!qcom,apq8064-iommu\smmu_pclkiommu_clkU= =eP{?@wNiommu@7600000!qcom,apq8064-iommu\smmu_pclkiommu_clkU= =e`{=>wOiommu@7c00000!qcom,apq8064-iommu\smmu_pclkiommu_clkU= =!e{EFw>iommu@7d00000!qcom,apq8064-iommu\smmu_pclkiommu_clkU= =!e{w?pci@1b500000!qcom,pcie-apq8064snps,dw-pcie ePP `XdbielbiparfconfigYpci *0i {msiD4G$%&'U + . -\coreifacephy( l k j i haxiahbporpciphy disabledhdmi-tx@4a00000!qcom,hdmi-tx-8960defaultLeXcore_physical {OU=>= =*\core_clkmaster_iface_clkslave_iface_clkM #hdmi-phyportsport@0eendpointport@1eendpointhdmi-phy@4a00400!qcom,hdmi-phy-8960e`Xhdmi_phyhdmi_pllU=\slave_iface_clk5wMmdp@5100000 !qcom,mdp4e {K0U=M===N=_=`3\core_clkiface_clkbus_clklut_clkhdmi_clktv_clk $NNOOokayportsport@0eendpointport@1eendpointPwGport@2eendpointport@3eendpointriva-pil@3204000!qcom,riva-pile   @ XccudxepmuUQ wdogfatalRiSvT( disabledwXiris !qcom,wcn3660U.\xo1UVWsmd-edge { 9rivawcnss !qcom,wcnss WCNSS_CTRLXbt!qcom,wcnss-btwifi!qcom,wcnss-wlan{txrxY Y tx-enabletx-rings-emptyetb@1a01000!coresight-etb10arm,primecelleU \apb_pclkportendpoint Zw\tpiu@1a03000!!arm,coresight-tpiuarm,primecelle0U \apb_pclkportendpoint [w]replicator!arm,coresight-replicatorU \apb_pclkportsport@0eendpoint\wZport@1eendpoint]w[port@2eendpoint ^wcfunnel@1a04000#!arm,coresight-funnelarm,primecelle@U \apb_pclkportsport@0eendpoint _weport@1eendpoint `wgport@4eendpoint awiport@5eendpoint bwkport@8eendpointcw^etm@1a1c000"!arm,coresight-etm3xarm,primecelleU \apb_pclkdportendpointew_etm@1a1d000"!arm,coresight-etm3xarm,primecelleU \apb_pclkfportendpointgw`etm@1a1e000"!arm,coresight-etm3xarm,primecelleU \apb_pclkhportendpointiwaetm@1a1f000"!arm,coresight-etm3xarm,primecelleU \apb_pclkjportendpointkwbimem@2a03f000!sysconsimple-mfde*reboot-mode!syscon-reboot-mode\wfU$wfU4wfUregulator-fixed@1!regulator-fixed2Z2Z Bext_3p3vQvoltage` qMvwFgpio-keys !gpio-keysvolume_up 9Volume Up Jsvolume_down 9Volume Down J&r #address-cells#size-cellsmodelcompatibleinterrupt-parentstdout-pathserial0serial1device_typeregrangesno-mapphandlerecord-sizeconsole-sizeftrace-sizeenable-methodnext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesgpio-controller#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrqcom,modepinctrl-1pagesizeqcom,controller-typeallow-set-timedebouncenvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvdd_l1_l2_l12_l18-supplyvin_lvs1_3_6-supplyvin_lvs4_5_7-supplyvdd_l24-supplyvdd_l25-supplyvin_lvs2-supplyvdd_l26-supplyvdd_l27-supplyvdd_l28-supplyvdd_ncp-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implemented#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vqcom,chipidiommusqcom,gpu-freqlabelassigned-clock-parentssyscon-sfpbvdda-supplyvdd-supplyvddio-supplyavdd-supplyvcss-supplyremote-endpointdata-lanesvddp-supplyiovcc-supplyenable-gpiosreset-gpiosdcdc-en-gpios#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapinterrupts-extendedvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namesslave-modecpumode-normalmode-bootloadermode-recoveryregulator-nameregulator-typestartup-delay-usgpioenable-active-highregulator-boot-onlinux,code