8(Sony Xperia Z!sony,xperia-yugaqcom,apq8064,chosen=serial0:115200n8aliases#I/soc/gsbi@1a200000/serial@1a240000memoryQmemory]reserved-memoryasmem@80000000] howcnss@8f000000]phoIcpuscpu@0 !qcom,kraitwqcom,kpss-acc-v1Qcpu]o^cpu@1 !qcom,kraitwqcom,kpss-acc-v1Qcpu]o`cpu@2 !qcom,kraitwqcom,kpss-acc-v1Qcpu] obcpu@3 !qcom,kraitwqcom,kpss-acc-v1Qcpu]  odl2-cache!cacheoidle-statesspc#!qcom,idle-state-spcarm,idle-state othermal-zonescpu-thermal0  *tripstrip07$CXpassivetrip17C Xcriticalcpu-thermal1  *ltripstrip07$CXpassivetrip17C Xcriticalcpu-thermal2  *tripstrip07$CXpassivetrip17C Xcriticalcpu-thermal3  *ltripstrip07$CXpassivetrip17C Xcriticalcpu-pmu!qcom,krait-pmu N clockscxo_board !fixed-clockYf$o.pxo_board !fixed-clockYfsleep_clk !fixed-clockYfo-hwmutex!qcom,sfpb-mutex v }osmem !qcom,smemsmd !qcom,smdmodem@0 N%  disabledq6@1 NZ  disableddsps@3 N @ disabledriva@6 N  disabledsmsm !qcom,smsm    @apps@0]oSmodem@1] N&q6@2] NYwcnss@3] NoHdsps@4] Nfirmwarescm!qcom,scm-apq8064( /coresoca !simple-buspinctrl@800000!qcom,apq8064-pinctrl]@;K NWdefaulteo$sdc4-gpioso>pios*ogpio63gpio64gpio65gpio66gpio67gpio68tsdc4sdcc1-pin-activeo7clk osdc1_clk}cmd osdc1_cmd} data osdc1_data} sdcc3-pin-activeo;clk osdc3_clk}cmd osdc3_cmd}data osdc3_data}ps_holdomuxogpio78tps_holdi2c1omuxogpio20gpio21tgsbi1pinconfogpio20gpio21i2c1_pins_sleepomuxogpio20gpio21tgpiopinconfogpio20gpio21gsbi1_uart_2pinsmuxogpio18gpio19tgsbi1gsbi1_uart_4pinsmuxogpio18gpio19gpio20gpio21tgsbi1i2c2omuxogpio24gpio25tgsbi2pinconfogpio24gpio25i2c2_pins_sleepomuxogpio24gpio25tgpiopinconfogpio24gpio25i2c3omux ogpio8gpio9tgsbi3pinconf ogpio8gpio9i2c3_pins_sleepomux ogpio8gpio9tgpiopinconf ogpio8gpio9i2c4omuxogpio12gpio13tgsbi4pinconfogpio12gpio13i2c4_pins_sleepomuxogpio12gpio13tgpiopinconfogpio12gpio13spi5_defaultopinmuxogpio51gpio52gpio54tgsbi5pinmux_cstgpioogpio53pinconfogpio51gpio52gpio54pinconf_csogpio53spi5_sleepopinmuxtgpioogpio51gpio52gpio53gpio54pinconfogpio51gpio52gpio53gpio54i2c6o muxogpio16gpio17tgsbi6pinconfogpio16gpio17i2c6_pins_sleepo!muxogpio16gpio17tgpiopinconfogpio16gpio17gsbi6_uart_2pinsmuxogpio14gpio15tgsbi6gsbi6_uart_4pinsmuxogpio14gpio15gpio16gpio17tgsbi6gsbi7_uart_2pinsmuxogpio82gpio83tgsbi7gsbi7_uart_4pinsmuxogpio82gpio83gpio84gpio85tgsbi7i2c7o"muxogpio84gpio85tgsbi7pinconfogpio84gpio85i2c7_pins_sleepo#muxogpio84gpio85tgpiopinconfogpio84gpio85riva-fm-activeogpio14gpio15triva_fmoNriva-bt-activeogpio16gpio17triva_btoMriva-wlan-active#ogpio64gpio65gpio66gpio67gpio68 triva_wlanoLhdmi-pinctrloDmuxogpio70gpio71gpio72thdmipinconf_ddcogpio70gpio71pinconf_hpdogpio72gsbi5-uart-pin-activeorxogpio52tgsbi5txogpio51tgsbi5sdcc3-cd-pin-activeogpio26tgpioo<syscon@1200000!syscon] o interrupt-controller@2000000!qcom,msm-qgic2] otimer@200a0005!qcom,kpss-timerqcom,kpss-wdt-apq8064qcom,msm-timer$N]fclock-controller@2088000!qcom,kpss-acc-v1]oclock-controller@2098000!qcom,kpss-acc-v1] oclock-controller@20a8000!qcom,kpss-acc-v1] oclock-controller@20b8000!qcom,kpss-acc-v1] o power-controller@2089000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2]opower-controller@2099000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2] opower-controller@20a9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2] o power-controller@20b9000%!qcom,apq8064-saw2-v1.1-cpuqcom,saw2] o sps-sic-non-secure@12100000!syscon]ogsbi@12440000 disabled!qcom,gsbi-v1.0.0]D( /ifaceaserial@12450000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]E@ N(  /coreiface disabledi2c@12460000!qcom,i2c-qup-v1.1.1eWdefaultsleep]F N(  /coreifacegsbi@12480000 disabled!qcom,gsbi-v1.0.0]H( /ifaceai2c@124a0000!qcom,i2c-qup-v1.1.1]JeWdefaultsleep N(  /coreifacegsbi@16200000 disabled!qcom,gsbi-v1.0.0] ( /ifaceai2c@16280000!qcom,i2c-qup-v1.1.1eWdefaultsleep]( N(  /coreifacegsbi@16300000 disabled!qcom,gsbi-v1.0.0]0( /ifaceai2c@16380000!qcom,i2c-qup-v1.1.1eWdefaultsleep]8 N(  /coreifacegsbi@1a200000ok!qcom,gsbi-v1.0.0] ( /ifaceaserial@1a240000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]$  N(  /coreifaceokWdefaultespi@1a280000!qcom,spi-qup-v1.1.1]( NeWdefaultsleep(  /coreiface disabledgsbi@16500000 disabled!qcom,gsbi-v1.0.0]P( /ifaceaserial@16540000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]TP N(  /coreiface disabledi2c@16580000!qcom,i2c-qup-v1.1.1e !Wdefaultsleep]X N(  /coreiface disabledgsbi@16600000 disabled!qcom,gsbi-v1.0.0]`( /ifaceaserial@16640000%!qcom,msm-uartdm-v1.3qcom,msm-uartdm]d` N(  /coreiface disabledi2c@16680000!qcom,i2c-qup-v1.1.1e"#Wdefaultsleep]h N(  /coreiface disabledrng@1a500000 !qcom,prng]P( /coressbi@c00000 !qcom,ssbi] pmic-arbiterpmic@1 !qcom,pm8821,$NLmpps@50!qcom,pm8821-mppqcom,ssbi-mpp]P N;Kqcom,ssbi@500000 !qcom,ssbi]P pmic-arbiterpmic@0 !qcom,pm8921,$NJo%gpio@150 !qcom,pm8921-gpioqcom,ssbi-gpio]P`N;Koggpio-keys-pin-activeogpio3gpio4gpio29gpio35tnormal$4ANbofmpps@50!qcom,pm8921-mppqcom,ssbi-mpp]P;K`Nrtc@11d!qcom,pm8921-rtc,%N']xpwrkey@1c!qcom,pm8921-pwrkey],%N23= qfprom@700000 !qcom,qfprom]pacalib]o&backup_calib]o'clock-controller@900000!qcom,gcc-apq8064]@&'calibcalib_backupYo clock-controller@28000000!qcom,lcc-apq8064](Yclock-controller@4000000!qcom,mmcc-apq8064]Yo?clock-controller@2011000!syscon]orpm@108000!qcom,rpm-apq8064] $Nackerrwakeupclock-controller!qcom,rpmcc-apq8064qcom,rpmccYoregulators!qcom,rpm-pm8921-regulators(((#)2(B*Q*`+o+s1~((0o*s2  joOs3 0I>oJs4~w@w@jo(s7  0o+s8!!jl1~l2OOl3..o0l4~w@w@o1l5-p-po9l6-p-po)l7:-pl8**l9--l10,@ ,@ oPl11--l12OOl14w@w@l15w@-pl16**l17l18OOl21l22'@'@l23w@w@l24 q0oKl25~l26l27l28l29lvs1lvs2oQlvs3lvs4lvs5lvs6lvs7usb-switchhdmi-switchncpw@w@jusb@12500000 !qcom,ci-hdrc]PP Nd( ~ /coreiface  @core%ulpi.?,Dusb-phyokayNotgo/ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phy(-. /sleepref/porVa0m1o,usb@12520000 !qcom,ci-hdrc]RR N( ) ' /coreiface ) dcore%ulpi.?2Dusb-phy disabledo3ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phyV(-. /sleepref3poro2usb@12530000 !qcom,ci-hdrc]SS N( , * /coreiface , ecore%ulpi.?4Dusb-phy disabledo5ulpiphy(!qcom,usb-hs-phy-apq8064qcom,usb-hs-phyV(-. /sleepref5poro4phy@1b400000!qcom,apq8064-sata-phy disabled]@yphy_mem( -/cfgVo6sata@29000000!qcom,apq8064-ahcigeneric-ahci disabled]) N(( ; . )/slave_ifaceifacebusrxoobcore_pmalive ?6 Dsata-phydma@12402000!qcom,bam-v1.3.0]@  Nb( n/bam_clko8dma@12182000!qcom,bam-v1.3.0]  N`( p/bam_clko:dma@121c2000!qcom,bam-v1.3.0]  N_( q/bam_clko=amba !simple-busasdcc@12400000okay!arm,pl18xarm,primecellWdefaulte7]@  Nhcmd_irq( x n/mclkapb_pclk88 txrx9#(sdcc@12180000!arm,pl18xarm,primecellokay]  Nfcmd_irq( z p/mclkapb_pclk q0:: txrx) 9$Wdefaulte;<sdcc@121c0000!arm,pl18xarm,primecell disabled]  Necmd_irq( { q/mclkapb_pclkl== txrxWdefaulte>syscon@1a400000!qcom,tcsr-apq8064syscon]@oadreno-3xx@4300000!qcom,adreno-3xx]0ykgsl_3d0_reg_memory NP kgsl_3d0_irq)/core_clkiface_clkmem_clkmem_iface_clk (?G??!?BN@@@@@@@@@@ @ @ @ @ @@@@@@@@@@@@@@@@@@AAAAAAAAAA A A A A AAAAAAAAAAAAAAAAAAqcom,gpu-pwrlevels!qcom,gpu-pwrlevelsqcom,gpu-pwrlevel@0Utqcom,gpu-pwrlevel@1Usyscon@5700000!syscon]ppoCmdss_dsi@4700000!qcom,mdss-dsi-ctrlcMDSS DSI CTRL->0 NR]p ydsi_ctrl8(????9?T?j?XD/iface_clkbus_clkcore_mmss_clksrc_clkbyte_clkpixel_clkcore_clk ?S?W?8?i iBBBBC?Bportsport@0]endpointport@1]endpointdsi-phy@4700200!qcom,dsi-phy-28nm-8960YV]ppp\"ydsi_plldsi_phydsi_phy_regulator /iface_clk(?oBiommu@7500000!qcom,apq8064-iommu/smmu_pclkiommu_clk(? ?]PN?@oFiommu@7600000!qcom,apq8064-iommu/smmu_pclkiommu_clk(? ?]`N=>oGiommu@7c00000!qcom,apq8064-iommu/smmu_pclkiommu_clk(? ?!]NEFo@iommu@7d00000!qcom,apq8064-iommu/smmu_pclkiommu_clk(? ?!]NoApci@1b500000!qcom,pcie-apq8064snps,dw-pcie ]PP `ydbielbiparfconfigQpci0a Nmsi$%&'( + . -/coreifacephy( l k j i haxiahbporpciphy disabledhdmi-tx@4a00000!qcom,hdmi-tx-8960WdefaulteD]ycore_physical NO(?>? ?*/core_clkmaster_iface_clkslave_iface_clk?E Dhdmi-phyportsport@0]endpointport@1]endpointhdmi-phy@4a00400!qcom,hdmi-phy-8960]`yhdmi_phyhdmi_pll(?/slave_iface_clkVoEmdp@5100000 !qcom,mdp4] NK0(?M???N?_?`3/core_clkiface_clkbus_clklut_clkhdmi_clktv_clk NFFGGportsport@0]endpointport@1]endpointport@2]endpointport@3]endpointriva-pil@3204000!qcom,riva-pil]   @ yccudxepmuH wdogfatalIJ K(okayWdefault eLMNoRiris !qcom,wcn3660(./xo#10O>PKQsmd-edge N crivawcnss !qcom,wcnss YWCNSS_CTRLkRbt!qcom,wcnss-btwifi!qcom,wcnss-wlanNtxrxuS S tx-enabletx-rings-emptyetb@1a01000!coresight-etb10arm,primecell]( /apb_pclkportendpointToVtpiu@1a03000!!arm,coresight-tpiuarm,primecell]0( /apb_pclkportendpointUoWreplicator!arm,coresight-replicator( /apb_pclkportsport@0]endpointVoTport@1]endpointWoUport@2]endpointXo]funnel@1a04000#!arm,coresight-funnelarm,primecell]@( /apb_pclkportsport@0]endpointYo_port@1]endpointZoaport@4]endpoint[ocport@5]endpoint\oeport@8]endpoint]oXetm@1a1c000"!arm,coresight-etm3xarm,primecell]( /apb_pclk^portendpoint_oYetm@1a1d000"!arm,coresight-etm3xarm,primecell]( /apb_pclk`portendpointaoZetm@1a1e000"!arm,coresight-etm3xarm,primecell]( /apb_pclkbportendpointco[etm@1a1f000"!arm,coresight-etm3xarm,primecell]( /apb_pclkdportendpointeo\gpio-keys !gpio-keys gpio-keysWdefaultefcamera-focus ccamera_focus <gcamera-snapshotccamera_snapshot <gvolume-down cvolume_down <grvolume-up cvolume_up <g#s #address-cells#size-cellsmodelcompatibleinterrupt-parentstdout-pathserial0device_typeregrangesno-mapphandleenable-methodnext-level-cacheqcom,accqcom,sawcpu-idle-statescache-levelentry-latency-usexit-latency-usmin-residency-uspolling-delay-passivepolling-delaythermal-sensorscoefficientstemperaturehysteresisinterrupts#clock-cellsclock-frequencysyscon#hwlock-cellsmemory-regionhwlocksqcom,ipcqcom,smd-edgestatusqcom,ipc-1qcom,ipc-2qcom,ipc-3qcom,ipc-4#qcom,smem-state-cellsinterrupt-controller#interrupt-cellsclocksclock-namesgpio-controller#gpio-cellspinctrl-namespinctrl-0pinsfunctiondrive-strenghbias-disablebias-pull-updrive-strengthoutput-highbias-pull-downcpu-offsetregulatorcell-indexsyscon-tcsrpinctrl-1qcom,modeqcom,controller-typedrive-push-pullinput-enablepower-sourceqcom,drive-strengthqcom,pull-up-strengthallow-set-timedebouncenvmem-cellsnvmem-cell-names#reset-cells#thermal-sensor-cellsinterrupt-namesvin_l1_l2_l12_l18-supplyvin_lvs_1_3_6-supplyvin_lvs_4_5_7-supplyvin_ncp-supplyvin_lvs2-supplyvin_l24-supplyvin_l25-supplyvin_l27-supplyvin_l28-supplyregulator-always-onregulator-min-microvoltregulator-max-microvoltqcom,switch-mode-frequencyqcom,force-modeassigned-clocksassigned-clock-ratesresetsreset-namesphy_typeahb-burst-configphysphy-namesdr_mode#phy-cellsv3p3-supplyv1p8-supplyreg-namesports-implemented#dma-cellsqcom,eearm,primecell-periphidbus-widthmax-frequencynon-removablecap-sd-highspeedcap-mmc-highspeeddmasdma-namesvmmc-supplyvqmmc-supplyno-1-8-vcd-gpiosqcom,chipidiommusqcom,gpu-freqlabelassigned-clock-parentssyscon-sfpb#iommu-cellsqcom,ncblinux,pci-domainbus-rangenum-lanesinterrupt-map-maskinterrupt-mapinterrupts-extendedvddcx-supplyvddmx-supplyvddpx-supplyvddxo-supplyvddrfa-supplyvddpa-supplyvdddig-supplyqcom,smd-channelsqcom,mmioqcom,smem-statesqcom,smem-state-namesslave-moderemote-endpointcpuinput-namelinux,input-typelinux,code