O8L(K,Miniand Hackberry&2miniand,hackberryallwinner,sun4i-a10aliases=/soc/ethernet@1c0b000G/soc/serial@1c28000chosenOVserial0:115200n8framebuffer-lcd0-hdmi02allwinner,simple-framebuffersimple-framebufferbde_be0-lcd0-hdmi0u8<> |disabledframebuffer-fe0-lcd0-hdmi02allwinner,simple-framebuffersimple-framebufferbde_fe0-de_be0-lcd0-hdmiPu8<>@@ |disabledframebuffer-fe0-lcd002allwinner,simple-framebuffersimple-framebufferbde_fe0-de_be0-lcd0@u8>@@ |disabledframebuffer-fe0-lcd0-tve002allwinner,simple-framebuffersimple-framebufferbde_fe0-de_be0-lcd0-tve0Pu68>@@ |disabledcpuscpu@0cpu2arm,cortex-a8u a\ p / thermal-zonescpu-thermalcooling-mapsmap0! &tripscpu-alert05 PApassivecpu-crit5A criticalclocksOclk-24ML 2fixed-clockYn6iosc24Mclk-32kL 2fixed-clockYiosc32kdisplay-engine#2allwinner,sun4i-a10-display-engine| |disabledsoc 2simple-busOsram-controller@1c00000$2allwinner,sun4i-a10-sram-controller0Osram@0 2mmio-sram Osram-section@80002allwinner,sun4i-a10-sram-a3-a4@|okay sram@10000 2mmio-sram Osram-section@02allwinner,sun4i-a10-sram-d |disableddma-controller@1c020002allwinner,sun4i-a10-dma u nand@1c030002allwinner,sun4i-a10-nand0%u'`ahbmod rxtx |disabledspi@1c050002allwinner,sun4i-a10-spiP u,pahbmodrxtx |disabledspi@1c060002allwinner,sun4i-a10-spi` u-qahbmod rxtxdefault  |disabledethernet@1c0b0002allwinner,sun4i-a10-emac7u* default |okay mdio@1c0b0802allwinner,sun4i-a10-mdio|okayethernet-phy@0 lcd-controller@1c0c0002allwinner,sun4i-a10-tcon, lcdu8ahbtcon-ch0tcon-ch1itcon0-pixel-clock portsport@0endpoint@0 /endpoint@1 +port@1endpoint@1 lcd-controller@1c0d0002allwinner,sun4i-a10-tcon- lcdu9ahbtcon-ch0tcon-ch1itcon1-pixel-clock portsport@0endpoint@0 0endpoint@1 ,port@1endpoint@1 mmc@1c0f0002allwinner,sun4i-a10-mmcu"bahbmmc default|okay1=GPmmc@1c100002allwinner,sun4i-a10-mmcu#eahbmmc! |disabledmmc@1c110002allwinner,sun4i-a10-mmcu$hahbmmc" |disabledmmc@1c120002allwinner,sun4i-a10-mmc u%kahbmmc# |disabledusb@1c130002allwinner,sun4i-a10-musb0u&\mclqusb{ |disabledphy@1c134002allwinner,sun4i-a10-usb-phy4Hphy_ctrlpmu1pmu2u}usb_phy!usb0_resetusb1_resetusb2_reset|okayusb@1c14000&2allwinner,sun4i-a10-ehcigeneric-ehci@'ulqusb|okayusb@1c14400&2allwinner,sun4i-a10-ohcigeneric-ohciD@u{lqusb|okaycrypto-engine@1c150002allwinner,sun4i-a10-cryptoPVuoahbmodhdmi@1c160002allwinner,sun4i-a10-hdmi`: u< ahbmodpll-0pll-1$ddc-txddc-rxaudio-tx |disabledportsport@0endpoint@0 endpoint@1 port@1spi@1c170002allwinner,sun4i-a10-spip u.rahbmodrxtx |disabledsata@1c180002allwinner,sun4i-a10-ahci8u1z |disabledusb@1c1c000&2allwinner,sun4i-a10-ehcigeneric-ehci(ulqusb|okayusb@1c1c400&2allwinner,sun4i-a10-ohcigeneric-ohciAu|lqusb|okayspi@1c1f0002allwinner,sun4i-a10-spi2u/ahbmodrxtx |disabledclock@1c200002allwinner,sun4i-a10-ccuu hoscloscLinterrupt-controller@1c204002allwinner,sun4i-a10-icpinctrl@1c208002allwinner,sun4i-a10-pinctrluJapbhosclosccan0-ph-pins PH20PH21 canemac0-pinsKPA0PA1PA2PA3PA4PA5PA6PA7PA8PA9PA10PA11PA12PA13PA14PA15PA16 emac i2c0-pinsPB0PB1 i2c0"i2c1-pins PB18PB19 i2c1#i2c2-pins PB20PB21 i2c2$ir0-rx-pinPB4 ir0 ir0-tx-pinPB3 ir0ir1-rx-pinPB23 ir1ir1-tx-pinPB22 ir1mmc0-pinsPF0PF1PF2PF3PF4PF5 mmc0%ps2-ch0-pins PI20PI21 ps2ps2-ch1-ph-pins PH12PH13 ps2pwm0-pinPB2 pwmpwm1-pinPI3 pwmspdif-tx-pinPB13 spdif%spi0-pi-pinsPI11PI12PI13 spi0spi0-cs0-pi-pinPI10 spi0spi1-pinsPI17PI18PI19 spi1 spi1-cs0-pinPI16 spi1 spi2-pb-pinsPB15PB16PB17 spi2spi2-pc-pinsPC20PC21PC22 spi2spi2-cs0-pb-pinPB14 spi2spi2-cs0-pc-pinPC19 spi2uart0-pb-pins PB22PB23 uart0!uart0-pf-pinsPF2PF4 uart0uart1-pins PA10PA11 uart1timer@1c20c002allwinner,sun4i-a10-timer uwatchdog@1c20c902allwinner,sun4i-a10-wdt rtc@1c20d002allwinner,sun4i-a10-rtc pwm@1c20e002allwinner,sun4i-a10-pwm u2 |disabledspdif@1c21000=2allwinner,sun4i-a10-spdif uFx apbspdifrxtx |disabledir@1c218002allwinner,sun4i-a10-iruKtapbir@|okaydefault ir@1c21c002allwinner,sun4i-a10-iruLuapbir@ |disabledi2s@1c22400=2allwinner,sun4i-a10-i2s$uGvapbmodrxtx |disabledlradc@1c228002allwinner,sun4i-a10-lradc-keys( |disabledcodec@1c22c00=2allwinner,sun4i-a10-codec,@uE apbcodecrxtx |disabledeeprom@1c238002allwinner,sun4i-a10-sid8rtp@1c250002allwinner,sun4i-a10-tsPNserial@1c280002snps,dw-apb-uart€dnuX|okaydefault!serial@1c284002snps,dw-apb-uart„dnuY |disabledserial@1c288002snps,dw-apb-uartˆdnuZ |disabledserial@1c28c002snps,dw-apb-uartŒdnu[ |disabledserial@1c290002snps,dw-apb-uartdnu\ |disabledserial@1c294002snps,dw-apb-uart”dnu] |disabledserial@1c298002snps,dw-apb-uart˜dnu^ |disabledserial@1c29c002snps,dw-apb-uartœdnu_ |disabledps2@1c2a0002allwinner,sun4i-a10-ps2 >uU |disabledps2@1c2a4002allwinner,sun4i-a10-ps2¤?uV |disabledi2c@1c2ac002allwinner,sun4i-a10-i2c¬uOdefault" |disabledi2c@1c2b0002allwinner,sun4i-a10-i2c°uPdefault# |disabledi2c@1c2b4002allwinner,sun4i-a10-i2c´ uQdefault$ |disabledcan@1c2bc002allwinner,sun4i-a10-can¼uS |disableddisplay-frontend@1e00000%2allwinner,sun4i-a10-display-frontend/u@ ahbmodramportsport@1endpoint@0 %-endpoint@1 &)display-frontend@1e20000%2allwinner,sun4i-a10-display-frontend0uA ahbmodramportsport@1endpoint@0 '.endpoint@1 (*display-backend@1e40000$2allwinner,sun4i-a10-display-backend0u? ahbmodramportsport@0endpoint@0 )&endpoint@1 *(port@1endpoint@0 +endpoint@1 ,display-backend@1e60000$2allwinner,sun4i-a10-display-backend/u> ahbmodramportsport@0endpoint@0 -%endpoint@1 .'port@1endpoint@0 /endpoint@1 0ahci-5v2regulator-fixed{ahci-5vLK@LK@ |disabledusb0-vbus2regulator-fixed {usb0-vbusLK@LK@  |disabledusb1-vbus2regulator-fixed {usb1-vbusLK@LK@|okayusb2-vbus2regulator-fixed {usb2-vbusLK@LK@ |okayvcc3v02regulator-fixed{vcc3v0--vcc3v32regulator-fixed{vcc3v32Z2Zvcc5v02regulator-fixed{vcc5v0LK@LK@emac-3v32regulator-fixed {emac-3v32Z2ZN  #address-cells#size-cellsinterrupt-parentmodelcompatibleethernet0serial0rangesstdout-pathallwinner,pipelineclocksstatusdevice_typeregclock-latencyoperating-points#cooling-cellscooling-min-levelcooling-max-levelphandlepolling-delay-passivepolling-delaythermal-sensorstripcooling-devicetemperaturehysteresis#clock-cellsclock-frequencyclock-output-namesallwinner,pipelinesinterrupts#dma-cellsclock-namesdmasdma-namespinctrl-namespinctrl-0allwinner,sramphyphy-supplyresetsreset-namesremote-endpointallwinner,tcon-channelvmmc-supplybus-widthcd-gpioscd-invertedinterrupt-namesphysphy-namesextcon#phy-cellsreg-namesusb1_vbus-supplyusb2_vbus-supply#reset-cellsinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellspinsfunctiondrive-strengthbias-pull-up#pwm-cells#sound-dai-cells#thermal-sensor-cellsreg-shiftreg-io-widthregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-boot-onenable-active-highgpiostartup-delay-us