8('firefly,firefly-rk3288rockchip,rk3288&7Firefly-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29Ecpu@501cpuarm,cortex-a12Ecpu@502cpuarm,cortex-a12Ecpu@503cpuarm,cortex-a12Eamba simple-busMdma-controller@ff250000arm,pl330arm,primecell%@T_2 zapb_pclkEdma-controller@ff600000arm,pl330arm,primecell`@T_2 zapb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@T_2 zapb_pclkEcreserved-memoryMdma-unusable@fe000000oscillator fixed-clockn6xin24mE timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a ztimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvzbiuciuciu-driveciu-sample  @resetokay (9KVdefaultd nzdwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswzbiuciuciu-driveciu-sample ! @resetokay KVdefault dnzdwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxzbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guyzbiuciuciu-driveciu-sample #@resetokay KVdefaultdnzsaradc@ff100000rockchip,saradc $2I[zsaradcapb_pclkW saradc-apbokayEspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARzspiclkapb_pclk  txrx ,Vdefaultd !"okayspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSzspiclkapb_pclk txrx -Vdefaultd#$%& disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTzspiclkapb_pclktxrx .Vdefaultd'()* disabledi2c@ff140000rockchip,rk3288-i2c >zi2c2MVdefaultd+okayi2c@ff150000rockchip,rk3288-i2c ?zi2c2OVdefaultd, disabledi2c@ff160000rockchip,rk3288-i2c @zi2c2PVdefaultd-okayi2c@ff170000rockchip,rk3288-i2c Azi2c2QVdefaultd.okayEyserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUzbaudclkapb_pclkVdefault d/01okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVzbaudclkapb_pclkVdefaultd2okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWzbaudclkapb_pclkVdefaultd3okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXzbaudclkapb_pclkVdefaultd4okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYzbaudclkapb_pclkVdefaultd5 disabledthermal-zonesreserve_thermal6cpu_thermald6tripscpu_alert0 ppassiveE7cpu_alert1 $passiveE8cpu_crit _ criticalcooling-mapsmap0$7 )map1$8 )gpu_thermald6tripsgpu_alert0 ppassiveE9gpu_crit _ criticalcooling-mapsmap0$9 )tsadc@ff280000rockchip,rk3288-tsadc( %2HZztsadcapb_pclk tsadc-apbVinitdefaultsleepd:8;B:LbsokayyE6ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq<82fgc]Mzstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok=inputVdefaultd>?@ABrgmii &'B@ ;CK0Tusb@ff500000 generic-ehciP 2zusbhost]Dbusb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2zotglhost]E busb2-phyokayVdefaultdFusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2zotglotgt@@ ]G busb2-phyokayusb@ff5c0000 generic-ehci\ 2zusbhost disabledi2c@ff650000rockchip,rk3288-i2ce <zi2c2LVdefaultdHokaysyr827@40silergy,syr827@vdd_cpu Pp&,B@WEsyr828@41silergy,syr828Avdd_gpu PpWE}hym8563@51haoyu,hym8563Qxin32k&IVdefaultdJact8846@5aactive-semi,act8846ZVdefaultdKLbzMregulatorsREG1vcc_ddrOOREG2vcc_io2Z2ZEREG3vdd_logREG4vcc_20EMREG5 vccio_sd2Z2ZEREG6 vdd10_lcdB@B@REG7vcca_18w@w@REG8vcca_332Z2ZEaREG9vcc_lan2Z2ZEBREG10vdd_10B@B@REG11vcc_18w@w@EREG12 vcc18_lcdw@w@i2c@ff660000rockchip,rk3288-i2cf =zi2c2NVdefaultdNokaypwm@ff680000rockchip,rk3288-pwmhVdefaultdO2^zpwm disabledpwm@ff680010rockchip,rk3288-pwmhVdefaultdP2^zpwmokaypwm@ff680020rockchip,rk3288-pwmh VdefaultdQ2^zpwm disabledpwm@ff680030rockchip,rk3288-pwmh0VdefaultdR2^zpwm disabledbus_intmem@ff700000 mmio-srampMpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEpower-controller!rockchip,rk3288-power-controllerh Efpd_vio@9 2chgfdehilkj$STUVWXYZ[pd_hevc@11 2op\]pd_video@12 2^pd_gpu@13 2_`reboot-modesyscon-reboot-modeRBRBRB !RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv<-Hjk$:#gׄeрxhрxhEsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE<edp-phyrockchip,rk3288-dp-phy2hz24mO disabledEvio-domains"rockchip,rk3288-io-voltage-domainokayZagqb|Busbphyrockchip,rk3288-usb-phyokayusb-phy@320O 2]zphyclkEGusb-phy@334O42^zphyclkEDusb-phy@348OH2_zphyclkEEwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif zhclkmclk2Tctx 6Vdefaultdd< disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5cctxrxzi2s_hclki2s_clk2RVdefaultde disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}zaclkhclksclkapb_pclk crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu2 zaclkiface" disablediommu@ff914000rockchip,iommu @P isp_mmu2 zaclkiface"/ disabledrga@ff920000rockchip,rk3288-rga 2jzaclkhclksclkJf ilm coreaxiahbvop@ff930000rockchip,rk3288-vop 2zaclk_vopdclk_vophclk_vopJf def axiahbdclkXgokayportE endpoint@0_hEzendpoint@1_iEwendpoint@2_jEqendpoint@3_kEtiommu@ff930300rockchip,iommu  vopb_mmu2 zaclkifaceJf "okayEgvop@ff940000rockchip,rk3288-vop 2zaclk_vopdclk_vophclk_vopJf  axiahbdclkXlokayportE endpoint@0_mE{endpoint@1_nExendpoint@2_oErendpoint@3_pEuiommu@ff940300rockchip,iommu  vopl_mmu2 zaclkifaceJf "okayElmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d zrefpclkJf < disabledportsportendpoint@0_qEjendpoint@1_rEolvds@ff96c000rockchip,rk3288-lvds@2g zpclk_lvdsVlcdcdsJf < disabledportsport@0endpoint@0_tEkendpoint@1_uEpdp@ff970000rockchip,rk3288-dp@ b2iczdppclk]vbdpodp< disabledportsport@0endpoint@0_wEiendpoint@1_xEnhdmi@ff980000rockchip,rk3288-dw-hdmi< g2hmnziahbisfrcecJf okayoyportsportendpoint@0_zEhendpoint@1_{Emiommu@ff9a0800rockchip,iommu vpu_mmu2 zaclkiface" disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu2 zaclkiface" disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu2{|Jf okay}gpu-opp-tableoperating-points-v2E|opp@100000000~opp@200000000 ~opp@300000000B@opp@400000000ׄopp@500000000eOopp@600000000#Fqos@ffaa0000syscon E_qos@ffaa0080syscon E`qos@ffad0000syscon ETqos@ffad0100syscon EUqos@ffad0180syscon EVqos@ffad0400syscon EWqos@ffad0480syscon EXqos@ffad0500syscon ESqos@ffad0800syscon EYqos@ffad0880syscon EZqos@ffad0900syscon E[qos@ffae0000syscon E^qos@ffaf0000syscon E\qos@ffaf0080syscon E]interrupt-controller@ffc01000 arm,gic-400@ @ `   Eefuse@ffb40000rockchip,rk3288-efuse 2q zpclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl<Mgpio0@ff750000rockchip,gpio-banku Q2@Egpio1@ff780000rockchip,gpio-bankx R2Agpio2@ff790000rockchip,gpio-banky S2Bgpio3@ff7a0000rockchip,gpio-bankz T2Cgpio4@ff7b0000rockchip,gpio-bank{ U2DECgpio5@ff7c0000rockchip,gpio-bank| V2Egpio6@ff7d0000rockchip,gpio-bank} W2Fgpio7@ff7e0000rockchip,gpio-bank~ X2GEIgpio8@ff7f0000rockchip,gpio-bank Y2HEhdmihdmi-cec-c0~hdmi-cec-c7~hdmi-ddc ~~pcfg-pull-upEpcfg-pull-down Epcfg-pull-noneE~pcfg-pull-none-12ma) Esleepglobal-pwroff~ddrio-pwroff~ddr0-retentionddr1-retentionedpedp-hpd i2c0i2c0-xfer ~~EHi2c1i2c1-xfer ~~E+i2c2i2c2-xfer  ~ ~ENi2c3i2c3-xfer ~~E,i2c4i2c4-xfer ~~E-i2c5i2c5-xfer ~~E.i2s0i2s0-bus`~~~~~~Eelcdclcdc-ctl@~~~~Essdmmcsdmmc-clkE sdmmc-cmdE sdmmc-cdEsdmmc-bus1sdmmc-bus4@Esdmmc-pwr ~Esdio0sdio0-bus1sdio0-bus4@Esdio0-cmdEsdio0-clk~Esdio0-cdsdio0-wpsdio0-pwrsdio0-bkpwrsdio0-intsdio1sdio1-bus1sdio1-bus4@sdio1-cdsdio1-wpsdio1-bkpwrsdio1-intsdio1-cmdsdio1-clk~sdio1-pwr emmcemmc-clk~Eemmc-cmdEemmc-pwr Eemmc-bus1emmc-bus4@emmc-bus8Espi0spi0-clk Espi0-cs0 Espi0-txE spi0-rxE!spi0-cs1E"spi1spi1-clk E#spi1-cs0 E&spi1-rxE%spi1-txE$spi2spi2-cs1spi2-clkE'spi2-cs0E*spi2-rxE)spi2-tx E(uart0uart0-xfer ~E/uart0-ctsE0uart0-rts~E1uart1uart1-xfer  ~E2uart1-cts uart1-rts ~uart2uart2-xfer ~E3uart3uart3-xfer ~E4uart3-cts uart3-rts ~uart4uart4-xfer ~E5uart4-cts uart4-rts ~tsadcotp-gpio ~E:otp-out ~E;pwm0pwm0-pin~EOpwm1pwm1-pin~EPpwm2pwm2-pin~EQpwm3pwm3-pin~ERgmacrgmii-pins~~~~~~~ ~~E>rmii-pins~~~~~~~~~~phy-int EAphy-pmebE@phy-rstE?spdifspdif-tx ~Edpcfg-output-high8Epcfg-output-lowDEpcfg-pull-up-drv-12ma) Eact8846pwr-holdELpmic-vselEKdvpdvp-pwr ~Ehym8563rtc-intEJkeyspwr-keyEledspower-led~Ework-led~Eusb_hosthost-vbus-drv~Eusbhub-rstEFusb_otgotg-vbus-drv ~Eirir-intEmemory@0memoryadc-keys adc-keysO[buttonslw@button-recovery Recoveryhdovdd-1v8-regulatorregulator-fixed dovdd_1v8w@w@WEbexternal-gmac-clock fixed-clocksY@ ext_gmacE=ir-receivergpio-ir-receiverVdefaultd Igpio-keys gpio-keyspower  GPIO PowertVdefaultdleds gpio-ledswork firefly:blue:user rc-feedbackVdefaultdpower firefly:green:power default-onVdefaultdvsys-regulatorregulator-fixedvcc_sysLK@LK@Esdmmc-regulatorregulator-fixed FI Vdefaultdvcc_sd2Z2ZWEflash-regulatorregulator-fixed vcc_flashw@w@WEusb-regulatorregulator-fixedvcc_5vLK@LK@WEusb-host-regulatorregulator-fixed FVdefaultd vcc_host_5vLK@LK@Wusb-otg-regulatorregulator-fixed F Vdefaultd vcc_otg_5vLK@LK@Wvcc28-dvp-regulatorregulator-fixed F Vdefaultd vcc28_dvp**WE #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplyphandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizefcs,suspend-voltage-selectorregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-enable-ramp-delayregulator-ramp-delayvin-supplysystem-power-controllervp1-supplyvp2-supplyvp3-supplyvp4-supplyinl1-supplyinl2-supplyinl3-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowio-channelsio-channel-nameskeyup-threshold-microvoltlabellinux,codepress-threshold-microvoltgpioswakeup-sourcelinux,default-triggerstartup-delay-usenable-active-high