q8( p@phytec,rk3288-pcm-947phytec,rk3288-phycore-somrockchip,rk3288&7Phytec RK3288 PCM-947aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/i2c@ff140000/rtc@68/i2c@ff650000/pmic@1carm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 .@<Ccpu@501cpuarm,cortex-a12Ccpu@502cpuarm,cortex-a12Ccpu@503cpuarm,cortex-a12Camba simple-busKdma-controller@ff250000arm,pl330arm,primecell%@R]< xapb_pclkCdma-controller@ff600000arm,pl330arm,primecell`@R]< xapb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@R]< xapb_pclkC\reserved-memoryKdma-unusable@fe000000oscillator fixed-clockn6xin24mCtimerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H <a xtimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр <Drvxbiuciuciu-driveciu-sample  @resetokay &7ITdefaultb lydwmmc@ff0d0000rockchip,rk3288-dw-mshcр <Eswxbiuciuciu-driveciu-sample ! @reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр <Ftxxbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр <Guyxbiuciuciu-driveciu-sample #@resetokay ITdefaultbsaradc@ff100000rockchip,saradc $<I[xsaradcapb_pclkW saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi<ARxspiclkapb_pclk  txrx ,Tdefaultb disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi<BSxspiclkapb_pclk txrx -Tdefaultb  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi<CTxspiclkapb_pclktxrx .Tdefaultb!"#$okayflash@0 micron,n25q128a13jedec,spi-norokayi2c@ff140000rockchip,rk3288-i2c >xi2c<MTdefaultb%okaytouchscreen@44 st,stmpe811Dadc@64maxim,max1037drtc@68rv4162hTdefaultb&&' i2c@ff150000rockchip,rk3288-i2c ?xi2c<OTdefaultb(okayeeprom@51 atmel,24c32Q i2c@ff160000rockchip,rk3288-i2c @xi2c<PTdefaultb)okayleddimmer@62 nxp,pca9533bled1 red:user1%noneled2 green:user2%noneled3 blue:user3%noneled4 red:user4%nonei2c@ff170000rockchip,rk3288-i2c Axi2c<QTdefaultb*okayCrserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7;E<MUxbaudclkapb_pclkTdefault b+,-okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8;E<NVxbaudclkapb_pclkTdefaultb. disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9;E<OWxbaudclkapb_pclkTdefaultb/okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :;E<PXxbaudclkapb_pclkTdefaultb0 disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;;E<QYxbaudclkapb_pclkTdefaultb1 disabledthermal-zonesreserve_thermalRhv2cpu_thermalRdhv2tripscpu_alert0ppassiveC3cpu_alert1$passiveC4cpu_crit_ criticalcooling-mapsmap03 map14 gpu_thermalRdhv2tripsgpu_alert0ppassiveC5gpu_crit_ criticalcooling-mapsmap05 tsadc@ff280000rockchip,rk3288-tsadc( %<HZxtsadcapb_pclk tsadc-apbTinitdefaultsleepb676sokay C2ethernet@ff290000rockchip,rk3288-gmac)$macirqeth_wake_irq488<fgc]Mxstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethokayAQ9hinputTdefault b:;<u=> rgmii-id 'B@ ?mdio0snps,dwmac-mdioethernet-phy@0ethernet-phy-ieee802.3-c22&? /C=usb@ff500000 generic-ehciP <xusbhostA@Fusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T <xotgPhostAA Fusb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X <xotgPotgXjy@@ AB Fusb2-phyokayusb@ff5c0000 generic-ehci\ <xusbhost disabledi2c@ff650000rockchip,rk3288-i2ce <xi2c<LTdefaultbCokaypmic@1crockchip,rk818&DTdefaultbEFFFFGFH H$regulatorsDCDC_REG11vdd_log@Tf~regulator-state-memDCDC_REG21vdd_gpu@Tf 5~regulator-state-memB@DCDC_REG31vcc_ddr@Tregulator-state-memDCDC_REG4 1vdd_3v3_io@Tf2Z~2ZCregulator-state-mem2ZDCDC_BOOST1vdd_sys@TfLK@~LK@CFregulator-state-memLK@SWITCH_REG1vdd_sd@TCregulator-state-memLDO_REG2 1vdd_eth_2v5@Tf&%~&%C>regulator-state-mem&%LDO_REG31vdd_1v0@TfB@~B@regulator-state-memB@LDO_REG41vdd_1v8_lcd_ldo@Tfw@~w@regulator-state-memw@LDO_REG6 1vdd_1v0_lcd@TfB@~B@regulator-state-memB@LDO_REG7 1vdd_1v8_ldo@Tfw@~w@Cregulator-state-memw@LDO_REG9 1vdd_io_sd@Tfw@~2ZCregulator-state-memeeprom@50 atmel,24c32P regulator@60 fcs,fan53555`@T,1vdd_cpuf 5~@1Fi2c@ff660000rockchip,rk3288-i2cf =xi2c<NTdefaultbI disabledpwm@ff680000rockchip,rk3288-pwmh<TdefaultbJ<^xpwm disabledpwm@ff680010rockchip,rk3288-pwmh<TdefaultbK<^xpwmokaypwm@ff680020rockchip,rk3288-pwmh <TdefaultbL<^xpwm disabledpwm@ff680030rockchip,rk3288-pwmh0<TdefaultbM<^xpwm disabledbus_intmem@ff700000 mmio-srampKpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsCpower-controller!rockchip,rk3288-power-controllerGAhQC_pd_vio@9 <chgfdehilkj$[NOPQRSTUVpd_hevc@11 <op[WXpd_video@12 <[Ypd_gpu@13 <[Z[reboot-modesyscon-reboot-modebiRBuRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv48HAjk$#gׄeрxhрxhCsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwC8edp-phyrockchip,rk3288-dp-phy<hx24m disabledCoio-domains"rockchip,rk3288-io-voltage-domainokayH)5Ausbphyrockchip,rk3288-usb-phyokayusb-phy@320 <]xphyclkCBusb-phy@3344<^xphyclkC@usb-phy@348H<_xphyclkCAwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt<p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdifN xhclkmclk<T\tx 6Tdefaultb]48 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2sN 5\\txrxxi2s_hclki2s_clk<RTdefaultb^_z disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 <}xaclkhclksclkapb_pclk crypto-rstokayiommu@ff900800rockchip,iommu@ $iep_mmu< xaclkiface disablediommu@ff914000rockchip,iommu @P $isp_mmu< xaclkiface disabledrga@ff920000rockchip,rk3288-rga <jxaclkhclksclk_ ilm coreaxiahbvop@ff930000rockchip,rk3288-vop <xaclk_vopdclk_vophclk_vop_ def axiahbdclk`okayportC endpoint@0aCsendpoint@1bCpendpoint@2cCjendpoint@3dCmiommu@ff930300rockchip,iommu  $vopb_mmu< xaclkiface_ okayC`vop@ff940000rockchip,rk3288-vop <xaclk_vopdclk_vophclk_vop_  axiahbdclkeokayportC endpoint@0fCtendpoint@1gCqendpoint@2hCkendpoint@3iCniommu@ff940300rockchip,iommu  $vopl_mmu< xaclkiface_ okayCemipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ <~d xrefpclk_ 48 disabledportsportendpoint@0jCcendpoint@1kChlvds@ff96c000rockchip,rk3288-lvds@<g xpclk_lvdsTlcdcbl_ 48 disabledportsport@0endpoint@0mCdendpoint@1nCidp@ff970000rockchip,rk3288-dp@ b<icxdppclkAoFdpodp48 disabledportsport@0endpoint@0pCbendpoint@1qCghdmi@ff980000rockchip,rk3288-dw-hdmiEN48 g<hmnxiahbisfrcec_ okayrportsportendpoint@0sCaendpoint@1tCfiommu@ff9a0800rockchip,iommu $vpu_mmu< xaclkiface disablediommu@ff9c0440rockchip,iommu @@@ o $hevc_mmu< xaclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ $jobmmugpu<u_  disabledgpu-opp-tableoperating-points-v2Cuopp@100000000  ~opp@200000000   ~opp@300000000  B@opp@400000000 ׄ opp@500000000 e Oopp@600000000 #F qos@ffaa0000syscon CZqos@ffaa0080syscon C[qos@ffad0000syscon COqos@ffad0100syscon CPqos@ffad0180syscon CQqos@ffad0400syscon CRqos@ffad0480syscon CSqos@ffad0500syscon CNqos@ffad0800syscon CTqos@ffad0880syscon CUqos@ffad0900syscon CVqos@ffae0000syscon CYqos@ffaf0000syscon CWqos@ffaf0080syscon CXinterrupt-controller@ffc01000 arm,gic-400  +@ @ `   Cefuse@ffb40000rockchip,rk3288-efuse <q xpclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl48Kgpio0@ff750000rockchip,gpio-banku Q<@ < L  +CDgpio1@ff780000rockchip,gpio-bankx R<A < L  +gpio2@ff790000rockchip,gpio-banky S<B < L  +Cgpio3@ff7a0000rockchip,gpio-bankz T<C < L  +gpio4@ff7b0000rockchip,gpio-bank{ U<D < L  +C?gpio5@ff7c0000rockchip,gpio-bank| V<E < L  +C'gpio6@ff7d0000rockchip,gpio-bank} W<F < L  +gpio7@ff7e0000rockchip,gpio-bank~ X<G < L  +C}gpio8@ff7f0000rockchip,gpio-bank Y<H < L  +Chdmihdmi-cec-c0 Xvhdmi-cec-c7 Xvhdmi-ddc Xvvpcfg-pull-up fCwpcfg-pull-down sCxpcfg-pull-none Cvpcfg-pull-none-12ma  Cysleepglobal-pwroff Xvddrio-pwroff Xvddr0-retention Xwddr1-retention Xwedpedp-hpd X xi2c0i2c0-xfer XvvCCi2c1i2c1-xfer XvvC%i2c2i2c2-xfer X v vCIi2c3i2c3-xfer XvvC(i2c4i2c4-xfer XvvC)i2c5i2c5-xfer XvvC*i2s0i2s0-bus` XvvvvvvC^lcdclcdc-ctl@ XvvvvClsdmmcsdmmc-clk XyC sdmmc-cmd XzC sdmmc-cd XwC sdmmc-bus1 Xwsdmmc-bus4@ XzzzzCsdmmc-pwr X vsdio0sdio0-bus1 Xwsdio0-bus4@ Xwwwwsdio0-cmd Xwsdio0-clk Xvsdio0-cd Xwsdio0-wp Xwsdio0-pwr Xwsdio0-bkpwr Xwsdio0-int Xwsdio1sdio1-bus1 Xwsdio1-bus4@ Xwwwwsdio1-cd Xwsdio1-wp Xwsdio1-bkpwr Xwsdio1-int Xwsdio1-cmd Xwsdio1-clk Xvsdio1-pwr X wemmcemmc-clk XyCemmc-cmd XyCemmc-pwr X wCemmc-bus1 Xwemmc-bus4@ Xwwwwemmc-bus8 XyyyyyyyyCspi0spi0-clk X wCspi0-cs0 X wCspi0-tx XwCspi0-rx XwCspi0-cs1 Xwspi1spi1-clk X wCspi1-cs0 X wC spi1-rx XwCspi1-tx XwCspi2spi2-cs1 Xwspi2-clk XwC!spi2-cs0 XwC$spi2-rx XwC#spi2-tx X wC"uart0uart0-xfer XwvC+uart0-cts XwC,uart0-rts XvC-uart1uart1-xfer Xw vC.uart1-cts X wuart1-rts X vuart2uart2-xfer XwvC/uart3uart3-xfer XwvC0uart3-cts X wuart3-rts X vuart4uart4-xfer XwvC1uart4-cts X wuart4-rts X vtsadcotp-gpio X vC6otp-out X vC7pwm0pwm0-pin XvCJpwm1pwm1-pin XvCKpwm2pwm2-pin XvCLpwm3pwm3-pin XvCMgmacrgmii-pins Xvvvvyyyyvvv yyvvC:rmii-pins Xvvvvvvvvvvphy-int XwC<phy-rst X{C;spdifspdif-tx X vC]pcfg-output-high C{ledsuser-led X{C|pmicpmic-int XwCEpmic-sleep Xwpcfg-pull-up-drv-12ma f Czbuttonsuser-button-pins XwwC~rv4162i2c-rtc-int X wC&touchscreents-irq-pin Xvusb_hosthost0-vbus-drv X vChost1-vbus-drv XvCusb_otgotg-vbus-drv X vCmemorymemoryexternal-gmac-clock fixed-clocksY@ ext_gmacC9user-leds gpio-ledsTdefaultb|user green_led } %heartbeat keepvdd-emmc-ioregulator-fixed 1vdd_emmc_iofw@~w@1Cvdd-in-otg-outregulator-fixed1vdd_in_otg_out@TfLK@~LK@CGvdd-misc-1v8regulator-fixed 1vdd_misc_1v8@Tfw@~w@CHuser-buttons gpio-keysTdefaultb~button@0home f button@1menu  usb-host0-regulatorregulator-fixed  Tdefaultb 1vcc_host0_5vfLK@~LK@@1Gusb-host1-regulatorregulator-fixed Tdefaultb 1vcc_host1_5vfLK@~LK@@1Gusb-otg-regulatorregulator-fixed  Tdefaultb 1vcc_otg_5vfLK@~LK@@1G #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2rtc0rtc1interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclocksphandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsvref-supplydmasdma-namesspi-max-frequencym25p,fast-readpagesizelabellinux,default-triggerreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-handlephy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayti,rx-internal-delayti,tx-internal-delayti,fifo-depthenet-phy-lane-no-swapti,clk-output-selphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyboost-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvddio-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltfcs,suspend-voltage-selectorregulator-enable-ramp-delayregulator-ramp-delayvin-supply#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supplyflash0-supplyflash1-supplygpio1830-supplygpio30-supplybb-supplydvp-supplylcdc-supplywifi-supplyaudio-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busoperating-points-v2opp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highgpiosdefault-statelinux,code