88( Z*chipspark,popmetal-rk3288rockchip,rk3288&7PopMetal-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12`@p@ @OOa sB@ ~ ' 9  K 0 $@29Ecpu@501cpuarm,cortex-a12Ecpu@502cpuarm,cortex-a12Ecpu@503cpuarm,cortex-a12Eamba simple-busMdma-controller@ff250000arm,pl330arm,primecell%@T_2 zapb_pclkEdma-controller@ff600000arm,pl330arm,primecell`@T_2 zapb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@T_2 zapb_pclkE[reserved-memoryMdma-unusable@fe000000oscillator fixed-clockn6xin24mE timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a ztimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvzbiuciuciu-driveciu-sample  @resetokay (9KVdefaultd n{dwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswzbiuciuciu-driveciu-sample ! @reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxzbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guyzbiuciuciu-driveciu-sample #@resetokay KVdefaultdsaradc@ff100000rockchip,saradc $2I[zsaradcapb_pclkW saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARzspiclkapb_pclk  txrx ,Vdefaultd disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSzspiclkapb_pclk txrx -Vdefaultd  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTzspiclkapb_pclktxrx .Vdefaultd!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >zi2c2MVdefaultd%okayak8963@dasahi-kasei,ak8975 &&Vdefaultd'l3g4200d@69st,l3g4200d-gyroi-mma8452@1d fsl,mma8452&&Vdefaultd(i2c@ff150000rockchip,rk3288-i2c ?zi2c2OVdefaultd)okayi2c@ff160000rockchip,rk3288-i2c @zi2c2PVdefaultd*okayi2c@ff170000rockchip,rk3288-i2c Azi2c2QVdefaultd+okayEqserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 7:D2MUzbaudclkapb_pclkVdefaultd,okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 8:D2NVzbaudclkapb_pclkVdefaultd-okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 9:D2OWzbaudclkapb_pclkVdefaultd.okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart ::D2PXzbaudclkapb_pclkVdefaultd/okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;:D2QYzbaudclkapb_pclkVdefaultd0okaythermal-zonesreserve_thermalQgu1cpu_thermalQdgu1tripscpu_alert0ppassiveE2cpu_alert1$passiveE3cpu_crit_ criticalcooling-mapsmap02 map13 gpu_thermalQdgu1tripsgpu_alert0ppassiveE4gpu_crit_ criticalcooling-mapsmap04 tsadc@ff280000rockchip,rk3288-tsadc( %2HZztsadcapb_pclk tsadc-apbVinitdefaultsleepd565sokayE1ethernet@ff290000rockchip,rk3288-gmac)#macirqeth_wake_irq3782fgc]Mzstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmacethok@8KrgmiiTinput a9q 'B@:Vdefaultd;0usb@ff500000 generic-ehciP 2zusbhost<usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2zotghost= usb2-phy disabledusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2zotgotg @@ > usb2-phyokayusb@ff5c0000 generic-ehci\ 2zusbhost disabledi2c@ff650000rockchip,rk3288-i2ce <zi2c2LVdefaultd?okaypmic@1brockchip,rk808&@VdefaultdAB=xin32krk808-clkout2KCWCcCoC{CCDC-regulatorsDCDC_REG1 qp(vdd_armEregulator-state-mem7DCDC_REG2 P(vdd_gpuregulator-state-memPhB@DCDC_REG3(vcc_ddrregulator-state-memPDCDC_REG42Z2Z(vcc_ioEregulator-state-memPh2ZLDO_REG12Z2Z(vcc_lanE8regulator-state-memPh2ZLDO_REG2w@2Z (vccio_sdEregulator-state-mem7LDO_REG3B@B@(vdd_10regulator-state-memPhB@LDO_REG4w@w@ (vcc18_lcdregulator-state-memPhw@LDO_REG5w@2Z(ldo5LDO_REG6B@B@ (vdd10_lcdregulator-state-memPhB@LDO_REG7w@w@(vcc_18EDregulator-state-memPhw@LDO_REG82Z2Z(vcca_33EXregulator-state-memPh2ZSWITCH_REG1 (vccio_wlEZregulator-state-memPSWITCH_REG2(vcc_lcdregulator-state-memPi2c@ff660000rockchip,rk3288-i2cf =zi2c2NVdefaultdEokaypwm@ff680000rockchip,rk3288-pwmhVdefaultdF2^zpwm disabledpwm@ff680010rockchip,rk3288-pwmhVdefaultdG2^zpwm disabledpwm@ff680020rockchip,rk3288-pwmh VdefaultdH2^zpwm disabledpwm@ff680030rockchip,rk3288-pwmh0VdefaultdI2^zpwm disabledbus_intmem@ff700000 mmio-srampMpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEpower-controller!rockchip,rk3288-power-controllerh E^pd_vio@9 2chgfdehilkj$JKLMNOPQRpd_hevc@11 2opSTpd_video@12 2Upd_gpu@13 2VWreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv37Hjk$#gׄeрxhрxhEsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE7edp-phyrockchip,rk3288-dp-phy2hz24m  disabledEnio-domains"rockchip,rk3288-io-voltage-domainokayX!+Y6D8R`p|Zusbphyrockchip,rk3288-usb-phyokayusb-phy@320  2]zphyclkE>usb-phy@334 42^zphyclkE<usb-phy@348 H2_zphyclkE=watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p O disabledsound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif zhclkmclk2T[tx 6Vdefaultd\37 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5[[txrxzi2s_hclki2s_clk2RVdefaultd] disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}zaclkhclksclkapb_pclk crypto-rstokayiommu@ff900800rockchip,iommu@ #iep_mmu2 zaclkiface disablediommu@ff914000rockchip,iommu @P #isp_mmu2 zaclkiface disabledrga@ff920000rockchip,rk3288-rga 2jzaclkhclksclk^ ilm coreaxiahbvop@ff930000rockchip,rk3288-vop 2zaclk_vopdclk_vophclk_vop^ def axiahbdclk_okayportE endpoint@0`Erendpoint@1aEoendpoint@2bEiendpoint@3cEliommu@ff930300rockchip,iommu  #vopb_mmu2 zaclkiface^ okayE_vop@ff940000rockchip,rk3288-vop 2zaclk_vopdclk_vophclk_vop^  axiahbdclkdokayportE endpoint@0eEsendpoint@1fEpendpoint@2gEjendpoint@3hEmiommu@ff940300rockchip,iommu  #vopl_mmu2 zaclkiface^ okayEdmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d zrefpclk^ 37 disabledportsportendpoint@0iEbendpoint@1jEglvds@ff96c000rockchip,rk3288-lvds@2g zpclk_lvdsVlcdcdk^ 37 disabledportsport@0endpoint@0lEcendpoint@1mEhdp@ff970000rockchip,rk3288-dp@ b2iczdppclkndpodp37 disabledportsport@0endpoint@0oEaendpoint@1pEfhdmi@ff980000rockchip,rk3288-dw-hdmiD37 g2hmnziahbisfrcec^ okay)qportsportendpoint@0rE`endpoint@1sEeiommu@ff9a0800rockchip,iommu #vpu_mmu2 zaclkiface disablediommu@ff9c0440rockchip,iommu @@@ o #hevc_mmu2 zaclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ #jobmmugpu25t^  disabledgpu-opp-tableoperating-points-v2Etopp@100000000IP~opp@200000000I P~opp@300000000IPB@opp@400000000IׄPopp@500000000IePOopp@600000000I#FPqos@ffaa0000syscon EVqos@ffaa0080syscon EWqos@ffad0000syscon EKqos@ffad0100syscon ELqos@ffad0180syscon EMqos@ffad0400syscon ENqos@ffad0480syscon EOqos@ffad0500syscon EJqos@ffad0800syscon EPqos@ffad0880syscon EQqos@ffad0900syscon ERqos@ffae0000syscon EUqos@ffaf0000syscon ESqos@ffaf0080syscon ETinterrupt-controller@ffc01000 arm,gic-400^s@ @ `   Eefuse@ffb40000rockchip,rk3288-efuse 2q zpclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl37Mgpio0@ff750000rockchip,gpio-banku Q2@^sE@gpio1@ff780000rockchip,gpio-bankx R2A^sgpio2@ff790000rockchip,gpio-banky S2B^sgpio3@ff7a0000rockchip,gpio-bankz T2C^sgpio4@ff7b0000rockchip,gpio-bank{ U2D^sE9gpio5@ff7c0000rockchip,gpio-bank| V2E^sgpio6@ff7d0000rockchip,gpio-bank} W2F^sgpio7@ff7e0000rockchip,gpio-bank~ X2G^sE{gpio8@ff7f0000rockchip,gpio-bank Y2H^sE&hdmihdmi-cec-c0uhdmi-cec-c7uhdmi-ddc uupcfg-pull-upEvpcfg-pull-downEwpcfg-pull-noneEupcfg-pull-none-12ma Exsleepglobal-pwroffuEBddrio-pwroffuddr0-retentionvddr1-retentionvedpedp-hpd wi2c0i2c0-xfer uuE?i2c1i2c1-xfer uuE%i2c2i2c2-xfer  u uEEi2c3i2c3-xfer uuE)i2c4i2c4-xfer uuE*i2c5i2c5-xfer uuE+i2s0i2s0-bus`uuuuuuE]lcdclcdc-ctl@uuuuEksdmmcsdmmc-clkuE sdmmc-cmdvE sdmmc-cdvEsdmmc-bus1vsdmmc-bus4@vvvvEsdmmc-pwr uE|sdio0sdio0-bus1vsdio0-bus4@vvvvsdio0-cmdvsdio0-clkusdio0-cdvsdio0-wpvsdio0-pwrvsdio0-bkpwrvsdio0-intvsdio1sdio1-bus1vsdio1-bus4@vvvvsdio1-cdvsdio1-wpvsdio1-bkpwrvsdio1-intvsdio1-cmdvsdio1-clkusdio1-pwr vemmcemmc-clkuEemmc-cmdvEemmc-pwr vEemmc-bus1vemmc-bus4@vvvvemmc-bus8vvvvvvvvEspi0spi0-clk vEspi0-cs0 vEspi0-txvEspi0-rxvEspi0-cs1vspi1spi1-clk vEspi1-cs0 vE spi1-rxvEspi1-txvEspi2spi2-cs1vspi2-clkvE!spi2-cs0vE$spi2-rxvE#spi2-tx vE"uart0uart0-xfer vuE,uart0-ctsvuart0-rtsuuart1uart1-xfer v uE-uart1-cts vuart1-rts uuart2uart2-xfer vuE.uart3uart3-xfer vuE/uart3-cts vuart3-rts uuart4uart4-xfer vuE0uart4-cts vuart4-rts utsadcotp-gpio uE5otp-out uE6pwm0pwm0-pinuEFpwm1pwm1-pinuEGpwm2pwm2-pinuEHpwm3pwm3-pinuEIgmacrgmii-pinsuuuuxxxxuuu xxuuE;rmii-pinsuuuuuuuuuuspdifspdif-tx uE\ak8963comp-intvE'buttonspwrbtnvEydvpdvp-pwruE~irir-intvEzmma8452gsensor-intvE(pmicpmic-intvEAmemory@0memoryexternal-gmac-clock fixed-clocksY@ ext_gmacE:gpio-keys gpio-keysVdefaultdypower @t GPIO Key Power = dir-receivergpio-ir-receiver @Vdefaultdzflash-regulatorregulator-fixed (vcc_flashw@w@ +Esdmmc-regulatorregulator-fixed l{ Vdefaultd|(vcc_sd2Z2Z 6 +Evsys-regulatorregulator-fixed(vcc_sysLK@LK@ECvcc18-dvp-regulatorregulator-fixed (vcc18-dvpw@w@ +}EYvcc28-dvp-regulatorregulator-fixed G l@Vdefaultd~ (vcc28_dvp** +E} #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplyphandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplymmc-ddr-1_8vmmc-hs200-1_8vnon-removable#io-channel-cellsdmasdma-namesvdd-supplyvid-supplyst,drdy-int-pinvddio-supplyreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphy-supplyphy-modeclock_in_outsnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-usassigned-clocksassigned-clock-parentstx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-supplyflash1-supplygpio30-supplygpio1830-supplylcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busoperating-points-v2opp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthautorepeatgpioslinux,codelabellinux,input-typedebounce-intervalvin-supplystartup-delay-usenable-active-high