8\( S$google,veyron-mickey-rev8google,veyron-mickey-rev7google,veyron-mickey-rev6google,veyron-mickey-rev5google,veyron-mickey-rev4google,veyron-mickey-rev3google,veyron-mickey-rev2google,veyron-mickey-rev1google,veyron-mickey-rev0google,veyron-mickeygoogle,veyronrockchip,rk3288&7Google Mickeyaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12hw@\@p@ @@OOa sB@ ~ ' 9 K 0 $@29Ecpu@501cpuarm,cortex-a12Ecpu@502cpuarm,cortex-a12Ecpu@503cpuarm,cortex-a12Eamba simple-busMdma-controller@ff250000arm,pl330arm,primecell%@T_2 zapb_pclkEdma-controller@ff600000arm,pl330arm,primecell`@T_2 zapb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@T_2 zapb_pclkEVreserved-memoryMdma-unusable@fe000000oscillator fixed-clockn6xin24mE timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 2 a ztimerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 2Drvzbiuciuciu-driveciu-sample  @reset disableddwmmc@ff0d0000rockchip,rk3288-dw-mshcр 2Eswzbiuciuciu-driveciu-sample ! @resetokay '4J Ucdefault q {dwmmc@ff0e0000rockchip,rk3288-dw-mshcр 2Ftxzbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 2Guyzbiuciuciu-driveciu-sample #@resetokay JUcdefault qsaradc@ff100000rockchip,saradc $2I[zsaradcapb_pclkW saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi2ARzspiclkapb_pclk  txrx ,cdefaultq disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi2BSzspiclkapb_pclk txrx -cdefaultq disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi2CTzspiclkapb_pclktxrx .cdefaultq !"okay% flash@0jedec,spi-nor8i2c@ff140000rockchip,rk3288-i2c >zi2c2Mcdefaultq#okayJ2bdtpm@20infineon,slb9645tt yi2c@ff150000rockchip,rk3288-i2c ?zi2c2Ocdefaultq$ disabledi2c@ff160000rockchip,rk3288-i2c @zi2c2Pcdefaultq% disabledJ2b,i2c@ff170000rockchip,rk3288-i2c Azi2c2Qcdefaultq&okayJ,bElserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 72MUzbaudclkapb_pclkcdefault q'()okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 82NVzbaudclkapb_pclkcdefaultq*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 92OWzbaudclkapb_pclkcdefaultq+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :2PXzbaudclkapb_pclkcdefaultq, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;2QYzbaudclkapb_pclkcdefaultq- disabledthermal-zonesreserve_thermal.cpu_thermald.tripscpu_crit_  criticalcpu_alert_almost_warm passivecpu_alert_warm passiveE/cpu_alert_almost_hot8 passiveE0cpu_alert_hot@P passiveE1cpu_alert_hotterH  passiveE2cpu_alert_very_hotL passiveE3cooling-mapscpu_warm_limit_cpu/ cpu_almost_hot_limit_cpu0 cpu_hot_limit_cpu1 cpu_hotter_limit_cpu2 cpu_very_hot_limit_cpu3 gpu_thermald.tripsgpu_alert0p passiveE4gpu_crit_  criticalcooling-mapsmap04 tsadc@ff280000rockchip,rk3288-tsadc( %2HZztsadcapb_pclk tsadc-apbcinitdefaultsleepq5,665@VsokaymE.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq782fgc]Mzstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmaceth disabledusb@ff500000 generic-ehciP 2zusbhost8usb disabledusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 2zotghost9 usb2-phy disabledusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 2zotghost @@ : usb2-phyokayz:usb@ff5c0000 generic-ehci\ 2zusbhost disabledi2c@ff650000rockchip,rk3288-i2ce <zi2c2Lcdefaultq;okayJ2bdpmic@1brockchip,rk808xin32kwifibt_32kin&<cdefault q=>?0Q_kw@A AE{regulatorsDCDC_REG1vdd_arm q 0qEregulator-state-memEDCDC_REG2vdd_gpu 50qEpregulator-state-mem^vB@DCDC_REG3 vcc135_ddrregulator-state-mem^DCDC_REG4vcc_18w@w@Eregulator-state-mem^vw@LDO_REG3vdd_10B@B@regulator-state-mem^vB@LDO_REG7 vdd10_lcdB@B@SWITCH_REG1 vcc33_lcdEUregulator-state-memELDO_REG8w@w@ vcc18_lcdi2c@ff660000rockchip,rk3288-i2cf =zi2c2NcdefaultqB disabledJ2b pwm@ff680000rockchip,rk3288-pwmhcdefaultqC2^zpwm disabledpwm@ff680010rockchip,rk3288-pwmhcdefaultqD2^zpwmokaypwm@ff680020rockchip,rk3288-pwmh cdefaultqE2^zpwm disabledpwm@ff680030rockchip,rk3288-pwmh0cdefaultqF2^zpwm disabledbus_intmem@ff700000 mmio-srampMpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsEpower-controller!rockchip,rk3288-power-controllerh EYpd_vio@9 2chgfdehilkj$GHIJKLMNOpd_hevc@11 2opPQpd_video@12 2Rpd_gpu@13 2STreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv7Hjk$#gׄeрxhрxhEsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwE7edp-phyrockchip,rk3288-dp-phy2hz24m! disabledEiio-domains"rockchip,rk3288-io-voltage-domainokay,@6AO@_@mUyusbphyrockchip,rk3288-usb-phyokayusb-phy@320! 2]zphyclkE:usb-phy@334!42^zphyclkE8usb-phy@348!H2_zphyclkE9watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt2p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif zhclkmclk2TVtx 6cdefaultqW7 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5VVtxrxzi2s_hclki2s_clki2s_clk_out2RqcdefaultqXokaycypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 2}zaclkhclksclkapb_pclk crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu2 zaclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu2 zaclkiface disabledrga@ff920000rockchip,rk3288-rga 2jzaclkhclksclkY ilm coreaxiahbvop@ff930000rockchip,rk3288-vop 2zaclk_vopdclk_vophclk_vopY def axiahbdclkZokayportE endpoint@0[Emendpoint@1\Ejendpoint@2]Edendpoint@3^Egiommu@ff930300rockchip,iommu  vopb_mmu2 zaclkifaceY okayEZvop@ff940000rockchip,rk3288-vop 2zaclk_vopdclk_vophclk_vopY  axiahbdclk_ disabledportE endpoint@0`Enendpoint@1aEkendpoint@2bEeendpoint@3cEhiommu@ff940300rockchip,iommu  vopl_mmu2 zaclkifaceY  disabledE_mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 2~d zrefpclkY 7 disabledportsportendpoint@0dE]endpoint@1eEblvds@ff96c000rockchip,rk3288-lvds@2g zpclk_lvdsclcdcqfY 7 disabledportsport@0endpoint@0gE^endpoint@1hEcdp@ff970000rockchip,rk3288-dp@ b2iczdppclkidpodp7 disabledportsport@0endpoint@0jE\endpoint@1kEahdmi@ff980000rockchip,rk3288-dw-hdmi7 g2hmnziahbisfrcecY okaylportsportendpoint@0mE[endpoint@1nE`iommu@ff9a0800rockchip,iommu vpu_mmu2 zaclkiface disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu2 zaclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu2$oY okay8pgpu-opp-tableoperating-points-v2Eoopp@100000000DK~opp@200000000D K~opp@300000000DKB@opp@400000000DׄKopp@500000000DeKOopp@600000000D#FKqos@ffaa0000syscon ESqos@ffaa0080syscon ETqos@ffad0000syscon EHqos@ffad0100syscon EIqos@ffad0180syscon EJqos@ffad0400syscon EKqos@ffad0480syscon ELqos@ffad0500syscon EGqos@ffad0800syscon EMqos@ffad0880syscon ENqos@ffad0900syscon EOqos@ffae0000syscon ERqos@ffaf0000syscon EPqos@ffaf0080syscon EQinterrupt-controller@ffc01000 arm,gic-400Yn@ @ `   Eefuse@ffb40000rockchip,rk3288-efuse 2q zpclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl7Mcdefaultsleepqq,qgpio0@ff750000rockchip,gpio-banku Q2@YnE<gpio1@ff780000rockchip,gpio-bankx R2AYngpio2@ff790000rockchip,gpio-banky S2BYnEzgpio3@ff7a0000rockchip,gpio-bankz T2CYngpio4@ff7b0000rockchip,gpio-bank{ U2DYnE~gpio5@ff7c0000rockchip,gpio-bank| V2EYngpio6@ff7d0000rockchip,gpio-bank} W2FYngpio7@ff7e0000rockchip,gpio-bank~ X2GYnEAgpio8@ff7f0000rockchip,gpio-bank Y2HYnhdmihdmi-cec-c0rhdmi-cec-c7rhdmi-ddc rrpower-hdmi-on rEpcfg-pull-upEspcfg-pull-downEtpcfg-pull-noneErpcfg-pull-none-12ma Evsleepglobal-pwroffrEqddrio-pwroffrddr0-retentionsddr1-retentionsedpedp-hpd ti2c0i2c0-xfer rrE;i2c1i2c1-xfer rrE#i2c2i2c2-xfer  r rEBi2c3i2c3-xfer rrE$i2c4i2c4-xfer rrE%i2c5i2c5-xfer rrE&i2s0i2s0-bus`rrrrrrEXlcdclcdc-ctl@rrrrEfsdmmcsdmmc-clkrsdmmc-cmdssdmmc-cdssdmmc-bus1ssdmmc-bus4@sssssdio0sdio0-bus1ssdio0-bus4@uuuuEsdio0-cmduEsdio0-clkuE sdio0-cdssdio0-wpssdio0-pwrssdio0-bkpwrssdio0-intswifienable-hrE}bt-enable-lrE|sdio1sdio1-bus1ssdio1-bus4@sssssdio1-cdssdio1-wpssdio1-bkpwrssdio1-intssdio1-cmdssdio1-clkrsdio1-pwr semmcemmc-clkuEemmc-cmduEemmc-pwr semmc-bus1semmc-bus4@ssssemmc-bus8uuuuuuuuEemmc-reset rEyspi0spi0-clk sEspi0-cs0 sEspi0-txsEspi0-rxsEspi0-cs1sspi1spi1-clk sEspi1-cs0 sEspi1-rxsEspi1-txsEspi2spi2-cs1sspi2-clksEspi2-cs0sE"spi2-rxsE!spi2-tx sE uart0uart0-xfer srE'uart0-ctssE(uart0-rtsrE)uart1uart1-xfer s rE*uart1-cts suart1-rts ruart2uart2-xfer srE+uart3uart3-xfer srE,uart3-cts suart3-rts ruart4uart4-xfer srE-uart4-cts suart4-rts rtsadcotp-gpio rE5otp-out rE6pwm0pwm0-pinrECpwm1pwm1-pinrEDpwm2pwm2-pinrEEpwm3pwm3-pinrEFgmacrgmii-pinsrrrrvvvvrrr vvrrrmii-pinsrrrrrrrrrrspdifspdif-tx rEWpcfg-pull-none-drv-8maEupcfg-pull-up-drv-8mapcfg-output-highpcfg-output-lowbuttonspwr-key-lsEwpmicpmic-int-lsE=dvs-1 tE>dvs-2tE?rebootap-warm-reset-h rExrecovery-switchrec-mode-l stpmtpm-int-hrwrite-protectfw-wp-aprmemory@0memorygpio-keys gpio-keyscdefaultqwpowerPower <t dQgpio-restart gpio-restart < cdefaultqx emmc-pwrseqmmc-pwrseq-emmcqycdefault $z Esdio-pwrseqmmc-pwrseq-simple2{ zext_clockcdefaultq|} $~E vcc-5vregulator-fixedvcc_5vLK@LK@ 0Evcc33-sysregulator-fixed vcc33_sys2Z2ZEvcc50-hdmiregulator-fixed vcc50_hdmi 0 ; NA cdefaultqvcc33_ioregulator-fixed vcc33_io 0E@ #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplyphandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-sd-highspeedcap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removablepinctrl-namespinctrl-0sd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplycap-mmc-highspeedrockchip,default-sample-phasedisable-wp#io-channel-cellsdmasdma-namesrx-sample-delay-nsspi-max-frequencyi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedreg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clock-parentsrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc7-supplyvcc8-supplyvddio-supplydvs-gpiosvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvoltregulator-suspend-mem-disabled#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervalpriorityreset-gpiosvin-supplyenable-active-highgpio