^8( Kgoogle,veyron-pinky-rev2google,veyron-pinkygoogle,veyronrockchip,rk3288& 7Google Pinkyaliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000/spi@ff110000/ec@0/i2c-tunnelarm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12h w@\@p@ @@OOa sB@ ~ ' 9 K 0 *@8?Kcpu@501cpuarm,cortex-a12Kcpu@502cpuarm,cortex-a12Kcpu@503cpuarm,cortex-a12Kamba simple-busSdma-controller@ff250000arm,pl330arm,primecell%@Ze8 apb_pclkKdma-controller@ff600000arm,pl330arm,primecell`@Ze8 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@Ze8 apb_pclkK`reserved-memorySdma-unusable@fe000000oscillator fixed-clockn6xin24mK timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 8 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshcр 8Drvbiuciuciu-driveciu-sample  @resetokay.? Q ZZx default  dwmmc@ff0d0000rockchip,rk3288-dw-mshcр 8Eswbiuciuciu-driveciu-sample ! @resetokay. default xdwmmc@ff0e0000rockchip,rk3288-dw-mshcр 8Ftxbiuciuciu-driveciu-sample "@reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshcр 8Guybiuciuciu-driveciu-sample #@resetokayZ#.defaultsaradc@ff100000rockchip,saradc $=8I[saradcapb_pclkW saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi8ARspiclkapb_pclkO  Ttxrx ,default !"#okayec@0google,cros-ec-spi^& default${-i2c-tunnelgoogle,cros-ec-i2c-tunnelsbs-battery@bsbs,sbs-battery keyboard-controllergoogle,cros-ec-keyb @};0DY1 d>"A#( C  \=@V B |)<?   + ^a !%$' & + ,./-32*5 4 9    8 l j6  g ispi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi8BSspiclkapb_pclkO Ttxrx -default%&'( disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi8CTspiclkapb_pclkOTtxrx .default)*+,okay flash@0jedec,spi-nor{i2c@ff140000rockchip,rk3288-i2c >i2c8Mdefault-okay%2=dtpm@20infineon,slb9645tt Ti2c@ff150000rockchip,rk3288-i2c ?i2c8Odefault.okay%2=,i2c@ff160000rockchip,rk3288-i2c @i2c8Pdefault/okay%2=,ts3a227e@3b ti,ts3a227e;&0default1lKtrackpad@15elan,ekth3000& default2w3i2c@ff170000rockchip,rk3288-i2c Ai2c8Qdefault4okay%,=Kwserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 78MUbaudclkapb_pclkdefault 567okayMlserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 88NVbaudclkapb_pclkdefault8okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 98OWbaudclkapb_pclkdefault9okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :8PXbaudclkapb_pclkdefault: disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;8QYbaudclkapb_pclkdefault; disabledthermal-zonesreserve_thermal<cpu_thermald<tripscpu_alert0p passiveK=cpu_alert1$ passiveK>cpu_crit_  criticalcooling-mapsmap0= map1> gpu_thermald<tripsgpu_alert0p passiveK?gpu_crit_  criticalcooling-mapsmap0? tsadc@ff280000rockchip,rk3288-tsadc( %8HZtsadcapb_pclk tsadc-apbinitdefaultsleep@+A5@?Us disabledlK<ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irqB88fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB stmmaceth disabledusb@ff500000 generic-ehciP 8usbhostCusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 8otghostD usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 8otghost @@ E usb2-phyokayzEusb@ff5c0000 generic-ehci\ 8usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c8LdefaultFokay%2=dpmic@1brockchip,rk808xin32kwifibt_32kin&0defaultG/P\htH3HHKregulatorsDCDC_REG1vdd_arm q1 IqKregulator-state-mem^DCDC_REG2vdd_gpu 51IqK{regulator-state-memwB@DCDC_REG3 vcc135_ddrregulator-state-memwDCDC_REG4vcc_18w@1w@Kregulator-state-memww@LDO_REG1 vcc33_io2Z12ZK3regulator-state-memw2ZLDO_REG3vdd_10B@1B@regulator-state-memwB@LDO_REG7vdd10_lcd_pwren_h&%1&%regulator-state-mem^SWITCH_REG1 vcc33_lcdK^regulator-state-mem^LDO_REG6 vcc18_codecw@1w@K_regulator-state-mem^LDO_REG4 vccio_sdw@12ZKregulator-state-mem^LDO_REG5 vcc33_sd2Z12ZK regulator-state-mem^LDO_REG8 vcc33_ccd2Z12Zregulator-state-memw2ZSWITCH_REG2 vcc18_lcdregulator-state-mem^i2c@ff660000rockchip,rk3288-i2cf =i2c8NdefaultIokay%2= max98090@10maxim,max98090&Jmclk8qdefaultKKpwm@ff680000rockchip,rk3288-pwmhdefaultL8^pwmokayKpwm@ff680010rockchip,rk3288-pwmhdefaultM8^pwmokaypwm@ff680020rockchip,rk3288-pwmh defaultN8^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0defaultO8^pwm disabledbus_intmem@ff700000 mmio-srampSpsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsKpower-controller!rockchip,rk3288-power-controllerh Kcpd_vio@9 8chgfdehilkj$PQRSTUVWXpd_hevc@11 8opYZpd_video@12 8[pd_gpu@13 8\]reboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruvBHjk$#gׄeрxhрxhKsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwKBedp-phyrockchip,rk3288-dp-phy8h24mokayKsio-domains"rockchip,rk3288-io-voltage-domainokay&30;I3Y3g^s_usbphyrockchip,rk3288-usb-phyokayusb-phy@320 8]phyclkKEusb-phy@33448^phyclkKCusb-phy@348H8_phyclkKDwatchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt8p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif hclkmclk8TO`Ttx 6defaultaB disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s 5O``Ttxrxi2s_hclki2s_clk8RdefaultbokayKcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 8}aclkhclksclkapb_pclk crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu8 aclkiface disablediommu@ff914000rockchip,iommu @P isp_mmu8 aclkiface disabledrga@ff920000rockchip,rk3288-rga 8jaclkhclksclk c ilm coreaxiahbvop@ff930000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vop c def axiahbdclk dokayportK endpoint@0 eKxendpoint@1 fKtendpoint@2 gKnendpoint@3 hKqiommu@ff930300rockchip,iommu  vopb_mmu8 aclkiface c okayKdvop@ff940000rockchip,rk3288-vop 8aclk_vopdclk_vophclk_vop c  axiahbdclk iokayportK endpoint@0 jKyendpoint@1 kKuendpoint@2 lKoendpoint@3 mKriommu@ff940300rockchip,iommu  vopl_mmu8 aclkiface c okayKimipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 8~d refpclk c B disabledportsportendpoint@0 nKgendpoint@1 oKllvds@ff96c000rockchip,rk3288-lvds@8g pclk_lvdslcdcp c B disabledportsport@0endpoint@0 qKhendpoint@1 rKmdp@ff970000rockchip,rk3288-dp@ b8icdppclksdpodpBokay -portsport@0endpoint@0 tKfendpoint@1 uKkport@1endpoint vKhdmi@ff980000rockchip,rk3288-dw-hdmiB g8hmniahbisfrcec c okay 7wportsportendpoint@0 xKeendpoint@1 yKjiommu@ff9a0800rockchip,iommu vpu_mmu8 aclkiface disablediommu@ff9c0440rockchip,iommu @@@ o hevc_mmu8 aclkiface disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu8 Cz c okay W{gpu-opp-tableoperating-points-v2Kzopp@100000000 c j~opp@200000000 c  j~opp@300000000 c jB@opp@400000000 cׄ jopp@500000000 ce jOopp@600000000 c#F jqos@ffaa0000syscon K\qos@ffaa0080syscon K]qos@ffad0000syscon KQqos@ffad0100syscon KRqos@ffad0180syscon KSqos@ffad0400syscon KTqos@ffad0480syscon KUqos@ffad0500syscon KPqos@ffad0800syscon KVqos@ffad0880syscon KWqos@ffad0900syscon KXqos@ffae0000syscon K[qos@ffaf0000syscon KYqos@ffaf0080syscon KZinterrupt-controller@ffc01000 arm,gic-400 x @ @ `   Kefuse@ffb40000rockchip,rk3288-efuse 8q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrlBSdefaultsleep|}+|~gpio0@ff750000rockchip,gpio-banku Q8@   x K0gpio1@ff780000rockchip,gpio-bankx R8A   x gpio2@ff790000rockchip,gpio-banky S8B   x gpio3@ff7a0000rockchip,gpio-bankz T8C   x gpio4@ff7b0000rockchip,gpio-bank{ U8D   x Kgpio5@ff7c0000rockchip,gpio-bank| V8E   x gpio6@ff7d0000rockchip,gpio-bank} W8F   x KJgpio7@ff7e0000rockchip,gpio-bank~ X8G   x K gpio8@ff7f0000rockchip,gpio-bank Y8H   x hdmihdmi-cec-c0 hdmi-cec-c7 hdmi-ddc pcfg-pull-up Kpcfg-pull-down Kpcfg-pull-none Kpcfg-pull-none-12ma  Ksleepglobal-pwroff K|ddrio-pwroff ddr0-retention ddr1-retention edpedp-hpd  i2c0i2c0-xfer KFi2c1i2c1-xfer K-i2c2i2c2-xfer   KIi2c3i2c3-xfer K.i2c4i2c4-xfer K/i2c5i2c5-xfer K4i2s0i2s0-bus` Kblcdclcdc-ctl@ Kpsdmmcsdmmc-clk Ksdmmc-cmd Ksdmmc-cd sdmmc-bus1 sdmmc-bus4@ Ksdmmc-cd-disabled Ksdmmc-cd-gpio Ksdmmc-wp-gpio  Ksdio0sdio0-bus1 sdio0-bus4@ Ksdio0-cmd Ksdio0-clk Ksdio0-cd sdio0-wp sdio0-pwr sdio0-bkpwr sdio0-int wifienable-h Kbt-enable-l Ksdio1sdio1-bus1 sdio1-bus4@ sdio1-cd sdio1-wp sdio1-bkpwr sdio1-int sdio1-cmd sdio1-clk sdio1-pwr  emmcemmc-clk Kemmc-cmd Kemmc-pwr  emmc-bus1 emmc-bus4@ emmc-bus8 Kemmc-reset  Kspi0spi0-clk  K spi0-cs0  K#spi0-tx K!spi0-rx K"spi0-cs1 spi1spi1-clk  K%spi1-cs0  K(spi1-rx K'spi1-tx K&spi2spi2-cs1 spi2-clk K)spi2-cs0 K,spi2-rx K+spi2-tx  K*uart0uart0-xfer K5uart0-cts K6uart0-rts K7uart1uart1-xfer  K8uart1-cts  uart1-rts  uart2uart2-xfer K9uart3uart3-xfer K:uart3-cts  uart3-rts  uart4uart4-xfer K;uart4-cts  uart4-rts  tsadcotp-gpio K@otp-out KApwm0pwm0-pin KLpwm1pwm1-pin KMpwm2pwm2-pin KNpwm3pwm3-pin KOgmacrgmii-pins  rmii-pins spdifspdif-tx  Kapcfg-pull-none-drv-8ma  Kpcfg-pull-up-drv-8ma  pcfg-output-high Kpcfg-output-low Kbuttonspwr-key-l ap-lid-int-l Kpwr-key-h Kpmicpmic-int-l KGrebootap-warm-reset-h Krecovery-switchrec-mode-l tpmtpm-int-h write-protectfw-wp-ap codechp-det Kint-codec KKmic-det  Kheadsetts3a227e-int-l K1backlightbl-en Kchargerac-present-ap Kcros-ecec-int K$suspendsuspend-l-wake K}suspend-l-sleep K~trackpadtrackpad-int K2usb-hosthost1-pwr-en Kusbotg-pwren-h Kmemory@0memorygpio-keys gpio-keysdefaultpower Power T0 t (dlid Lid T0  : (gpio-restart gpio-restart T0 default Ksdio-pwrseqmmc-pwrseq-simple8 ext_clockdefault TKvcc-5vregulator-fixedvcc_5vLK@1LK@ `KHvcc33-sysregulator-fixed vcc33_sys2Z12Z `Kvcc50-hdmiregulator-fixed vcc50_hdmi `Hsound!rockchip,rockchip-audio-max98090default kVEYRON-I2S z  J J  backlightpwm-backlight   !"#$%&'()*+,-./0123456789:;<=>?@ABCDEFGHIJKLMNOPQRSTUVWXYZ[\]^_`abcdefghijklmnopqrstuvwxyz{|}~   default #B@ (  = Kgpio-charger gpio-charger Nmains T0defaultpanelinnolux,n116bgesimple-panelokay [^ hportsportendpoint Kvvccsysregulator-fixedvccsysKvcc5-host1-regulatorregulator-fixed r 0 default vcc5_host1vcc5v-otg-regulatorregulator-fixed r 0 default vcc5_host2 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2i2c20interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points#cooling-cellsclock-latencyclockscpu0-supplyphandleranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaycd-gpiosrockchip,default-sample-phasesd-uhs-sdr12sd-uhs-sdr25sd-uhs-sdr50sd-uhs-sdr104vmmc-supplyvqmmc-supplypinctrl-namespinctrl-0wp-gpioscap-sdio-irqkeep-power-in-suspendmmc-pwrseqnon-removabledisable-wpmmc-hs200-1_8v#io-channel-cellsdmasdma-namesgoogle,cros-ec-spi-pre-delayspi-max-frequencygoogle,remote-bussbs,i2c-retry-countsbs,poll-retry-countkeypad,num-rowskeypad,num-columnsgoogle,needs-ghost-filterlinux,keymaprx-sample-delay-nsi2c-scl-falling-time-nsi2c-scl-rising-time-nspowered-while-suspendedti,micbiasvcc-supplywakeup-sourcereg-shiftreg-io-widthassigned-clocksassigned-clock-ratespolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfphysphy-namesneeds-reset-on-resumedr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizeassigned-clock-parentsrockchip,system-power-controllervcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc12-supplyvddio-supplyvcc10-supplyvcc9-supplyvcc11-supplyregulator-nameregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cells#phy-cellsbb-supplydvp-supplyflash0-supplygpio1830-supplygpio30-supplylcdc-supplywifi-supplyaudio-supplysdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointforce-hpdddc-i2c-busoperating-points-v2mali-supplyopp-hzopp-microvoltinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highoutput-lowlabellinux,codedebounce-intervallinux,input-typepriorityreset-gpiosvin-supplyrockchip,modelrockchip,i2s-controllerrockchip,audio-codecrockchip,hp-det-gpiosrockchip,mic-det-gpiosrockchip,headset-codecbrightness-levelsdefault-brightness-levelenable-gpiospwmspost-pwm-on-delay-mspwm-off-delay-mscharger-typepower-supplybacklightenable-active-highgpio