8( ܐ!ti,am3517-evmti,am3517ti,omap3 +&7TI AM3517 EVM (AM3517/05 TMDSEVM3517)chosen=/ocp@68000000/serial@49020000aliasesI/ocp@68000000/i2c@48070000N/ocp@68000000/i2c@48072000S/ocp@68000000/i2c@48060000X/ocp@68000000/serial@4806a000`/ocp@68000000/serial@4806c000h/ocp@68000000/serial@49020000p/ocp@68000000/serial@4809e000x/ocp@68000000/can@5c050000 |/display@0cpus+cpu@0arm,cortex-a8cpucpupmu@54000000arm,cortex-a8-pmuTdebugsssocti,omap-inframpu ti,omap3-mpumpuiva ti,iva2.2iva disableddsp ti,omap3-c64ocp@68000000ti,omap3-l3-smxsimple-bush +l3_mainl4@48000000ti,omap3-l4-coresimple-bus+ Hscm@2000ti,omap3-scmsimple-bus + pinmux@30 ti,omap3-padconfpinctrl-single08+8Udefaultcpinmux_wl12xx_buffer_pinsm&pinmux_mmc2_pinsXm(*,.02468:pinmux_rtc_pinsmpinmux_tsc2004_pinsmpinmux_uart2_pins(mDFHJpinmux_mcbsp1_pins m`bfhpinmux_mcbsp2_pins m pinmux_leds_pinsm$&pinmux_mmc1_pins@m "pinmux_pwm_pinsmpinmux_backlight_pinsmpinmux_dss_dpi_pinsmpinmux_hsusb1_rst_pinsmscm_conf@270sysconsimple-busp0+ p0pbias_regulator@2b0ti,pbias-omap3ti,pbias-omappbias_mmc_omap2430pbias_mmc_omap2430w@-clocks+mcbsp5_mux_fck@68ti,composite-mux-clockh mcbsp5_fckti,composite-clock mcbsp1_mux_fck@4ti,composite-mux-clock mcbsp1_fckti,composite-clock mcbsp2_mux_fck@4ti,composite-mux-clock mcbsp2_fckti,composite-clock mcbsp3_mux_fck@68ti,composite-mux-clock hmcbsp3_fckti,composite-clockmcbsp4_mux_fck@68ti,composite-mux-clock hmcbsp4_fckti,composite-clockemac_ick@32cti,am35xx-gate-clock,zemac_fck@32cti,gate-clock, vpfe_ick@32cti,am35xx-gate-clock,{vpfe_fck@32cti,gate-clock, hsotgusb_ick_am35xx@32cti,am35xx-gate-clock,|hsotgusb_fck_am35xx@32cti,gate-clock,}hecc_ck@32cti,am35xx-gate-clock,~clockdomainspinmux@a00 ti,omap3-padconfpinctrl-single \+8pinmux_wl12xx_wkup_pinsm aes@480c5000 ti,omap3-aesaesH PPABtxrxprm@48306000 ti,omap3-prmH0`@ clocks+virt_16_8m_ck fixed-clockYosc_sys_ck@d40 ti,mux-clock @sys_ck@1270ti,divider-clockpsys_clkout1@d70ti,gate-clock pdpll3_x2_ckfixed-factor-clock*5dpll3_m2x2_ckfixed-factor-clock *5"dpll4_x2_ckfixed-factor-clock!*5corex2_fckfixed-factor-clock"*5#wkup_l4_ickfixed-factor-clock*5Rcorex2_d3_fckfixed-factor-clock#*5scorex2_d5_fckfixed-factor-clock#*5tclockdomainscm@48004000 ti,omap3-cmH@@clocks+dummy_apb_pclk fixed-clockomap_32k_fck fixed-clockDvirt_12m_ck fixed-clockvirt_13m_ck fixed-clock]@virt_19200000_ck fixed-clock$virt_26000000_ck fixed-clockvirt_38_4m_ck fixed-clockIdpll4_ck@d00ti,omap3-dpll-per-clock D 0!dpll4_m2_ck@d48ti,divider-clock!? H$dpll4_m2x2_mul_ckfixed-factor-clock$*5%dpll4_m2x2_ck@d00ti,gate-clock% ?&omap_96m_alwon_fckfixed-factor-clock&*5-dpll3_ck@d00ti,omap3-dpll-core-clock @ 0dpll3_m3_ck@1140ti,divider-clock@'dpll3_m3x2_mul_ckfixed-factor-clock'*5(dpll3_m3x2_ck@d00ti,gate-clock(  ?)emu_core_alwon_ckfixed-factor-clock)*5fsys_altclk fixed-clock2mcbsp_clks fixed-clockdpll3_m2_ck@d40ti,divider-clock @ core_ckfixed-factor-clock *5*dpll1_fck@940ti,divider-clock* @+dpll1_ck@904ti,omap3-dpll-clock+  $ @ 4dpll1_x2_ckfixed-factor-clock*5,dpll1_x2m2_ck@944ti,divider-clock, D@cm_96m_fckfixed-factor-clock-*5.omap_96m_fck@d40 ti,mux-clock. @Idpll4_m3_ck@e40ti,divider-clock! @/dpll4_m3x2_mul_ckfixed-factor-clock/*50dpll4_m3x2_ck@d00ti,gate-clock0 ?1omap_54m_fck@d40 ti,mux-clock12 @<cm_96m_d2_fckfixed-factor-clock.*53omap_48m_fck@d40 ti,mux-clock32 @4omap_12m_fckfixed-factor-clock4*5Kdpll4_m4_ck@e40ti,divider-clock! @5dpll4_m4x2_mul_ckti,fixed-factor-clock5Ucp6dpll4_m4x2_ck@d00ti,gate-clock6 ?pxdpll4_m5_ck@f40ti,divider-clock!?@7dpll4_m5x2_mul_ckti,fixed-factor-clock7Ucp8dpll4_m5x2_ck@d00ti,gate-clock8 ?pdpll4_m6_ck@1140ti,divider-clock!?@9dpll4_m6x2_mul_ckfixed-factor-clock9*5:dpll4_m6x2_ck@d00ti,gate-clock: ?;emu_per_alwon_ckfixed-factor-clock;*5gclkout2_src_gate_ck@d70 ti,composite-no-wait-gate-clock* p=clkout2_src_mux_ck@d70ti,composite-mux-clock*.< p>clkout2_src_ckti,composite-clock=>?sys_clkout2@d70ti,divider-clock?@ pmpu_ckfixed-factor-clock@*5Aarm_fck@924ti,divider-clockA $emu_mpu_alwon_ckfixed-factor-clockA*5hl3_ick@a40ti,divider-clock* @Bl4_ick@a40ti,divider-clockB @Crm_ick@c40ti,divider-clockC @gpt10_gate_fck@a00ti,composite-gate-clock  Egpt10_mux_fck@a40ti,composite-mux-clockD @Fgpt10_fckti,composite-clockEFgpt11_gate_fck@a00ti,composite-gate-clock  Ggpt11_mux_fck@a40ti,composite-mux-clockD @Hgpt11_fckti,composite-clockGHcore_96m_fckfixed-factor-clockI*5mmchs2_fck@a00ti,wait-gate-clock mmchs1_fck@a00ti,wait-gate-clock i2c3_fck@a00ti,wait-gate-clock i2c2_fck@a00ti,wait-gate-clock i2c1_fck@a00ti,wait-gate-clock mcbsp5_gate_fck@a00ti,composite-gate-clock  mcbsp1_gate_fck@a00ti,composite-gate-clock   core_48m_fckfixed-factor-clock4*5Jmcspi4_fck@a00ti,wait-gate-clockJ mcspi3_fck@a00ti,wait-gate-clockJ mcspi2_fck@a00ti,wait-gate-clockJ mcspi1_fck@a00ti,wait-gate-clockJ uart2_fck@a00ti,wait-gate-clockJ uart1_fck@a00ti,wait-gate-clockJ  core_12m_fckfixed-factor-clockK*5Lhdq_fck@a00ti,wait-gate-clockL core_l3_ickfixed-factor-clockB*5Msdrc_ick@a10ti,wait-gate-clockM ygpmc_fckfixed-factor-clockM*5core_l4_ickfixed-factor-clockC*5Nmmchs2_ick@a10ti,omap3-interface-clockN mmchs1_ick@a10ti,omap3-interface-clockN hdq_ick@a10ti,omap3-interface-clockN mcspi4_ick@a10ti,omap3-interface-clockN mcspi3_ick@a10ti,omap3-interface-clockN mcspi2_ick@a10ti,omap3-interface-clockN mcspi1_ick@a10ti,omap3-interface-clockN i2c3_ick@a10ti,omap3-interface-clockN i2c2_ick@a10ti,omap3-interface-clockN i2c1_ick@a10ti,omap3-interface-clockN uart2_ick@a10ti,omap3-interface-clockN uart1_ick@a10ti,omap3-interface-clockN  gpt11_ick@a10ti,omap3-interface-clockN  gpt10_ick@a10ti,omap3-interface-clockN  mcbsp5_ick@a10ti,omap3-interface-clockN  mcbsp1_ick@a10ti,omap3-interface-clockN  omapctrl_ick@a10ti,omap3-interface-clockN dss_tv_fck@e00ti,gate-clock<dss_96m_fck@e00ti,gate-clockIdss2_alwon_fck@e00ti,gate-clockdummy_ck fixed-clockgpt1_gate_fck@c00ti,composite-gate-clock Ogpt1_mux_fck@c40ti,composite-mux-clockD @Pgpt1_fckti,composite-clockOPaes2_ick@a10ti,omap3-interface-clockN wkup_32k_fckfixed-factor-clockD*5Qgpio1_dbck@c00ti,gate-clockQ sha12_ick@a10ti,omap3-interface-clockN wdt2_fck@c00ti,wait-gate-clockQ wdt2_ick@c10ti,omap3-interface-clockR wdt1_ick@c10ti,omap3-interface-clockR gpio1_ick@c10ti,omap3-interface-clockR omap_32ksync_ick@c10ti,omap3-interface-clockR gpt12_ick@c10ti,omap3-interface-clockR gpt1_ick@c10ti,omap3-interface-clockR per_96m_fckfixed-factor-clock-*5 per_48m_fckfixed-factor-clock4*5Suart3_fck@1000ti,wait-gate-clockS gpt2_gate_fck@1000ti,composite-gate-clockTgpt2_mux_fck@1040ti,composite-mux-clockD@Ugpt2_fckti,composite-clockTUgpt3_gate_fck@1000ti,composite-gate-clockVgpt3_mux_fck@1040ti,composite-mux-clockD@Wgpt3_fckti,composite-clockVWgpt4_gate_fck@1000ti,composite-gate-clockXgpt4_mux_fck@1040ti,composite-mux-clockD@Ygpt4_fckti,composite-clockXYgpt5_gate_fck@1000ti,composite-gate-clockZgpt5_mux_fck@1040ti,composite-mux-clockD@[gpt5_fckti,composite-clockZ[gpt6_gate_fck@1000ti,composite-gate-clock\gpt6_mux_fck@1040ti,composite-mux-clockD@]gpt6_fckti,composite-clock\]gpt7_gate_fck@1000ti,composite-gate-clock^gpt7_mux_fck@1040ti,composite-mux-clockD@_gpt7_fckti,composite-clock^_gpt8_gate_fck@1000ti,composite-gate-clock `gpt8_mux_fck@1040ti,composite-mux-clockD@agpt8_fckti,composite-clock`agpt9_gate_fck@1000ti,composite-gate-clock bgpt9_mux_fck@1040ti,composite-mux-clockD@cgpt9_fckti,composite-clockbcper_32k_alwon_fckfixed-factor-clockD*5dgpio6_dbck@1000ti,gate-clockdgpio5_dbck@1000ti,gate-clockdgpio4_dbck@1000ti,gate-clockdgpio3_dbck@1000ti,gate-clockdgpio2_dbck@1000ti,gate-clockd wdt3_fck@1000ti,wait-gate-clockd per_l4_ickfixed-factor-clockC*5egpio6_ick@1010ti,omap3-interface-clockegpio5_ick@1010ti,omap3-interface-clockegpio4_ick@1010ti,omap3-interface-clockegpio3_ick@1010ti,omap3-interface-clockegpio2_ick@1010ti,omap3-interface-clocke wdt3_ick@1010ti,omap3-interface-clocke uart3_ick@1010ti,omap3-interface-clocke uart4_ick@1010ti,omap3-interface-clockegpt9_ick@1010ti,omap3-interface-clocke gpt8_ick@1010ti,omap3-interface-clocke gpt7_ick@1010ti,omap3-interface-clockegpt6_ick@1010ti,omap3-interface-clockegpt5_ick@1010ti,omap3-interface-clockegpt4_ick@1010ti,omap3-interface-clockegpt3_ick@1010ti,omap3-interface-clockegpt2_ick@1010ti,omap3-interface-clockemcbsp2_ick@1010ti,omap3-interface-clockemcbsp3_ick@1010ti,omap3-interface-clockemcbsp4_ick@1010ti,omap3-interface-clockemcbsp2_gate_fck@1000ti,composite-gate-clock mcbsp3_gate_fck@1000ti,composite-gate-clockmcbsp4_gate_fck@1000ti,composite-gate-clockemu_src_mux_ck@1140 ti,mux-clockfgh@iemu_src_ckti,clkdm-gate-clockijpclk_fck@1140ti,divider-clockj@pclkx2_fck@1140ti,divider-clockj@atclk_fck@1140ti,divider-clockj@traceclk_src_fck@1140 ti,mux-clockfgh@ktraceclk_fck@1140ti,divider-clockk @secure_32k_fck fixed-clocklgpt12_fckfixed-factor-clockl*5wdt1_fckfixed-factor-clockl*5ipss_ick@a10ti,am35xx-interface-clockM rmii_ck fixed-clockpclk_ck fixed-clockuart4_ick_am35xx@a10ti,omap3-interface-clockN uart4_fck_am35xx@a00ti,wait-gate-clockJ dpll5_ck@d04ti,omap3-dpll-clock  $ L 4mdpll5_m2_ck@d50ti,divider-clockm Pwsgx_gate_fck@b00ti,composite-gate-clock* ucore_d3_ckfixed-factor-clock**5ncore_d4_ckfixed-factor-clock**5ocore_d6_ckfixed-factor-clock**5pomap_192m_alwon_fckfixed-factor-clock&*5qcore_d2_ckfixed-factor-clock**5rsgx_mux_fck@b40ti,composite-mux-clock nop.qrst @vsgx_fckti,composite-clockuvsgx_ick@b10ti,wait-gate-clockB cpefuse_fck@a08ti,gate-clock ts_fck@a08ti,gate-clockD usbtll_fck@a08ti,wait-gate-clockw usbtll_ick@a18ti,omap3-interface-clockN mmchs3_ick@a10ti,omap3-interface-clockN mmchs3_fck@a00ti,wait-gate-clock dss1_alwon_fck_3430es2@e00ti,dss-gate-clockxpdss_ick_3430es2@e10ti,omap3-dss-interface-clockCusbhost_120m_fck@1400ti,gate-clockwusbhost_48m_fck@1400ti,dss-gate-clock4usbhost_ick@1410ti,omap3-dss-interface-clockCclockdomainscore_l3_clkdmti,clockdomainyz{|}~dpll3_clkdmti,clockdomaindpll1_clkdmti,clockdomainper_clkdmti,clockdomainhemu_clkdmti,clockdomainjdpll4_clkdmti,clockdomain!wkup_clkdmti,clockdomain dss_clkdmti,clockdomaincore_l4_clkdmti,clockdomaindpll5_clkdmti,clockdomainmsgx_clkdmti,clockdomainusbhost_clkdmti,clockdomain counter@48320000ti,omap-counter32kH2  counter_32kinterrupt-controller@48200000ti,omap3-intcH dma-controller@48056000"ti,omap3630-sdmati,omap3430-sdmaH`  `dmagpio@48310000ti,omap3-gpioH1gpio1gpio@49050000ti,omap3-gpioIgpio2gpio@49052000ti,omap3-gpioI gpio3gpio@49054000ti,omap3-gpioI@ gpio4gpio@49056000ti,omap3-gpioI`!gpio5gpio@49058000ti,omap3-gpioI"gpio6serial@4806a000ti,omap3-uartH H12txrxuart1lserial@4806c000ti,omap3-uartHI34txrxuart2lUdefaultcbluetooth ti,wl1271-st '-serial@49020000ti,omap3-uartIJ56txrxuart3li2c@48070000 ti,omap3-i2cH8txrx+i2c1s35390a@30 sii,s35390a0Udefaultc tps65023@48 ti,tps65023HregulatorsVDCDC1 vdd_core1OOVDCDC2vdd_io12Z2ZVDCDC3vdd_1v81w@w@LDO1 vdd_usb181w@w@LDO2 vdd_usb3312Z2Ztsc2004@4b ti,tsc2004KEUdefaultc Pcv@i2c@48072000 ti,omap3-i2cH 9txrx+i2c2codec@1ati,tlv320aic23okaycodec@1bti,tlv320aic23okaygpio@21 ti,tca6416! i2c@48060000 ti,omap3-i2cH=txrx+i2c3codec@1ati,tlv320aic23okaygpio@20 ti,tca6416  gpio@21 ti,tca6416! tvp5146@5c ti,tvp5146m2\mailbox@48094000ti,omap3-mailboxmailboxH @"4 disableddsp F Qspi@48098000ti,omap2-mcspiH A+mcspi1\@#$%&'()* tx0rx0tx1rx1tx2rx2tx3rx3spi@4809a000ti,omap2-mcspiH B+mcspi2\ +,-.tx0rx0tx1rx1spi@480b8000ti,omap2-mcspiH [+mcspi3\ tx0rx0tx1rx1spi@480ba000ti,omap2-mcspiH 0+mcspi4\FGtx0rx01w@480b2000 ti,omap3-1wH :hdq1wmmc@4809c000ti,omap3-hsmmcH Smmc1j=>txrxwokayUdefaultc  mmc@480b4000ti,omap3-hsmmcH @Vmmc2/0txrxVokayUdefaultc+wlcore@2 ti,wl1271  mmc@480ad000ti,omap3-hsmmcH ^mmc3MNtxrx disabledmmu@480bd400ti,omap2-iommuH mmu_isp disabledmmu@5d000000ti,omap2-iommu]mmu_iva disabledwdt@48314000 ti,omap3-wdtH1@ wd_timer2mcbsp@48074000ti,omap3-mcbspH@mpu ;< commontxrx-mcbsp1 txrxfckokUdefaultcmcbsp@49022000ti,omap3-mcbspI I mpusidetone>?commontxrxsidetone-mcbsp2mcbsp2_sidetone!"txrxfckickokUdefaultcmcbsp@49024000ti,omap3-mcbspI@I mpusidetoneYZcommontxrxsidetone-mcbsp3mcbsp3_sidetonetxrxfckick disabledmcbsp@49026000ti,omap3-mcbspI`mpu 67 commontxrx-mcbsp4txrxfck disabledmcbsp@48096000ti,omap3-mcbspH `mpu QR commontxrx-mcbsp5txrxfck disabledsham@480c3000ti,omap3-shamshamH 0d1Erxtimer@48318000ti,omap3430-timerH1%timer1<timer@49032000ti,omap3430-timerI &timer2timer@49034000ti,omap3430-timerI@'timer3timer@49036000ti,omap3430-timerI`(timer4timer@49038000ti,omap3430-timerI)timer5Ktimer@4903a000ti,omap3430-timerI*timer6Ktimer@4903c000ti,omap3430-timerI+timer7Ktimer@4903e000ti,omap3430-timerI,timer8XKtimer@49040000ti,omap3430-timerI-timer9Xtimer@48086000ti,omap3430-timerH`.timer10Xtimer@48088000ti,omap3430-timerH/timer11Xtimer@48304000ti,omap3430-timerH0@_timer12<eusbhstll@48062000 ti,usbhs-tllH N usb_tll_hsusbhshost@48064000ti,usbhs-hostH@ usb_host_hs+ uehci-phyohci@48064400ti,ohci-omap3HDLehci@48064800 ti,ehci-omapHHMgpmc@6e000000ti,omap3430-gpmcgpmcnrxtx+0nand@0,0ti,omap2-nandmicron,mt29f4g16abchch bch8,,,;"N,a(p6@RR(+usb_otg_hs@480ab000ti,omap3-musbH \]mcdma usb_otg_hs  disableddss@48050000 ti,omap3-dssHok dss_corefck+Udefaultcdispc@48050400ti,omap3-dispcH dss_dispcfckencoder@4804fc00 ti,omap3-dsiHH@H protophypll disabled dss_dsi1 fcksys_clkencoder@48050800ti,omap3-rfbiH disabled dss_rfbifckickencoder@48050c00ti,omap3-vencH  disabled dss_vencfckportendpoint*:ssi-controller@48058000 ti,omap3-ssissi disabledHHsysgddGgdd_mpu+ssi-port@4805a000ti,omap3-ssi-portHHtxrxCDssi-port@4805b000ti,omap3-ssi-portHHtxrxEFam35x_otg_hs@5c040000ti,omap3-musb am35x_otg_hs disabled\Gmcethernet@5c000000ti,am3517-emac davinci_emacokay\CDEFE` zickethernet@5c030000ti,davinci_mdio davinci_mdiookay\B@+fckserial@4809e000ti,omap3-uartuart4 disabledH T76txrxlpinmux@480025d8 ti,omap3-padconfpinctrl-singleH%$+8Udefaultcpinmux_hsusb1_pins`m  can@5c050000ti,am3517-hecc disabled\\0\ hecchecc-rammbx~wl12xx_bufregulator-fixed wl1271_bufw@w@Udefaultc 1wl12xx_vmmc2regulator-fixedvwl1271w@w@Udefaultc p1codec1simple-audio-cardtlv320aic23-hifi-,MicrophoneMic InLineLine InLineLine OutIFLine OutLOUTLine OutROUTLLINEINLine InRLINEINLine InMICINMic In`i2sysimple-audio-card,cpusimple-audio-card,codeccodec2simple-audio-cardtlv320aic23-hifi-,MicrophoneMic InLineLine InLineLine OutIFLine OutLOUTLine OutROUTLLINEINLine InRLINEINLine InMICINMic In`i2sysimple-audio-card,cpusimple-audio-card,codecexpander-keysgpio-keys-polleddrecordRecord !playPlay !StopStop ! fwdFWD ! rwdRWD ! shiftShift* ! ModeMode< ! MenuMenu !UpUpg !DownDownl !memory@80000000memoryvmmcregulator-fixed vmmc_fixed2Z2Zgpio-keysgpio-keys-polledduser_pbUser Push Button !user_sw_1User Switch 1 !user_sw_2User Switch 2 ! user_sw_3User Switch 3 ! user_sw_4User Switch 4 ! user_sw_5User Switch 5 ! user_sw_6User Switch 6 ! user_sw_7User Switch 7 !user_sw_8User Switch 8 !gpio-leds gpio-ledsUdefaultcuser_led_1am3517evm:green:user_led_1 !onuser_led_2am3517evm:green:user_led_2 !onuser_led_3am3517evm:green:user_led_3 !  mmc0user_led_4am3517evm:green:user_led_4 ! heartbeatdisplay@0 panel-dpi15okayUdefault  portendpoint*panel-timingT@  & . ; G* Q ] j  t   backlightpwm-backlightUdefault c LK@, (2<FPZd  dmtimer-pwm@11ti,omap-dmtimer-pwmUdefaultc  hsusb1_phyusb-nop-xceiv   compatibleinterrupt-parent#address-cells#size-cellsmodelstdout-pathi2c0i2c1i2c2serial0serial1serial2serial3candisplay0device_typeregclocksclock-namesclock-latencycpu0-supplyinterruptsti,hwmodsstatusranges#pinctrl-cells#interrupt-cellsinterrupt-controllerpinctrl-single,register-widthpinctrl-single,function-maskpinctrl-namespinctrl-0pinctrl-single,pinsphandlesysconregulator-nameregulator-min-microvoltregulator-max-microvolt#clock-cellsti,bit-shiftdmasdma-namesclock-frequencyti,max-divti,index-starts-at-oneclock-multclock-divti,set-bit-to-disableti,clock-multti,clock-divti,set-rate-parentti,index-power-of-twoti,low-power-stopti,lock#dma-cellsdma-channelsdma-requeststi,gpio-always-ongpio-controller#gpio-cellsinterrupts-extendedenable-gpiosmax-speedregulator-always-onvio-supplytouchscreen-fuzz-xtouchscreen-fuzz-ytouchscreen-fuzz-pressuretouchscreen-size-xtouchscreen-size-ytouchscreen-max-pressureti,x-plate-ohmsti,esd-recovery-timeout-ms#sound-dai-cellsvcc-supply#mbox-cellsti,mbox-num-usersti,mbox-num-fifosti,mbox-txti,mbox-rxti,spi-num-csti,dual-voltpbias-supplyvmmc-supplybus-widthwp-gpioscd-gpiosnon-removablecap-power-off-cardref-clock-frequencytcxo-clock-frequency#iommu-cellsti,#tlb-entriesreg-namesinterrupt-namesti,buffer-sizeti,timer-alwonti,timer-dspti,timer-pwmti,timer-secureport1-moderemote-wakeup-connectedphysgpmc,num-csgpmc,num-waitpinslinux,mtd-namenand-bus-widthti,nand-ecc-optgpmc,sync-clk-psgpmc,cs-on-nsgpmc,cs-rd-off-nsgpmc,cs-wr-off-nsgpmc,adv-on-nsgpmc,adv-rd-off-nsgpmc,adv-wr-off-nsgpmc,we-off-nsgpmc,oe-off-nsgpmc,access-nsgpmc,rd-cycle-nsgpmc,wr-cycle-nsgpmc,wr-access-nsgpmc,wr-data-mux-bus-nsgpmc,device-widthmultipointnum-epsram-bitsvdds_dsi-supplyvdda_video-supplyremote-endpointdata-linesti,davinci-ctrl-reg-offsetti,davinci-ctrl-mod-reg-offsetti,davinci-ctrl-ram-offsetti,davinci-ctrl-ram-sizeti,davinci-rmii-enlocal-mac-addressbus_freqgpiovin-supplystartup-delay-usenable-active-highsimple-audio-card,namesimple-audio-card,widgetssimple-audio-card,routingsimple-audio-card,formatsimple-audio-card,bitclock-mastersimple-audio-card,frame-mastersound-daisystem-clock-frequencypoll-intervallabellinux,codedefault-statelinux,default-triggerhactivevactivehfront-porchhback-porchhsync-lenvback-porchvfront-porchvsync-lenhsync-activevsync-activede-activepixelclk-activepower-supplypwmsbrightness-levelsdefault-brightness-levelti,timers#pwm-cellsreset-gpios#phy-cells