8( %asus,rk3288-tinker-srockchip,rk3288&$7Rockchip RK3288 Asus Tinker Board Saliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5< Hcpu@501cpuarm,cortex-a12'@5Hcpu@502cpuarm,cortex-a12'@5Hcpu@503cpuarm,cortex-a12'@5Hcpu-opp-tableoperating-points-v2PHopp-126000000[b opp-216000000[ b opp-312000000[b opp-408000000[Qb opp-600000000[#Fb opp-696000000[)|b~opp-816000000[0,bB@opp-1008000000[<bopp-1200000000[Gbopp-1416000000[TfrbOopp-1512000000[ZJb opp-1608000000[_"bpamba simple-buspdma-controller@ff250000arm,pl330arm,primecell%@w5 apb_pclkHdma-controller@ff600000arm,pl330arm,primecell`@w5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@w5 apb_pclkHWreserved-memorypdma-unusable@fe000000oscillator fixed-clockn6xin24mH timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshc р 5Drvbiuciuciu-driveciu-sample  @#resetokay/9K\fqdefault dwmmc@ff0d0000rockchip,rk3288-dw-mshc р 5Eswbiuciuciu-driveciu-sample ! @#reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc р 5Ftxbiuciuciu-driveciu-sample "@#reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc р 5Guybiuciuciu-driveciu-sample #@#resetokay/9fqdefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW #saradc-apbokayspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,qdefault disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -qdefault  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .qdefault!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mqdefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Oqdefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pqdefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qqdefault(okayHmserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclkqdefault)okayserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclkqdefault*okayserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkqdefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclkqdefault,okayserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclkqdefault-okaythermal-zonesreserve_thermal&4.cpu_thermald&4.tripscpu_alert0DpPpassiveH/cpu_alert1D$PpassiveH0cpu_critD_P criticalcooling-mapsmap0[/0`map1[00`gpu_thermald&4.tripsgpu_alert0DpPpassiveH1gpu_critD_P criticalcooling-mapsmap0[10`tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk #tsadc-apbqinitdefaultsleep2o3y2sokayH.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq485fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB #stmmacethok5&input3rgmii<6qdefault7 G8W m'B@0usb@ff500000 generic-ehciP 5usbhost9usbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghost: usb2-phyokayusb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ ; usb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Lqdefault<okaypmic@1brockchip,rk808&=xin32krk808-clkout2= = qdefault>?@AB B,B8BDBPB\ChCtCBCCregulatorsDCDC_REG1 qpvdd_arm pH regulator-state-mem"DCDC_REG2 Pvdd_gpu pHrregulator-state-mem;SB@DCDC_REG3vcc_ddrregulator-state-mem;DCDC_REG42Z2Zvcc_ioHCregulator-state-mem;S2ZLDO_REG1w@w@ vcc18_ldo1Hregulator-state-mem;Sw@LDO_REG22Z2Z vcc33_mipiregulator-state-mem"LDO_REG3B@B@vdd_10regulator-state-mem;SB@LDO_REG4w@w@ vcc18_codecregulator-state-mem;Sw@LDO_REG5w@2Z vccio_sdHregulator-state-mem;S2ZLDO_REG6B@B@ vdd10_lcdregulator-state-mem;SB@LDO_REG7w@w@vcc_18regulator-state-mem;Sw@LDO_REG8w@w@ vcc18_lcdregulator-state-mem;Sw@SWITCH_REG1 vcc33_sdHregulator-state-mem;SWITCH_REG2 vcc33_lanH6regulator-state-mem;i2c@ff660000rockchip,rk3288-i2cf =i2c5NqdefaultDokaypwm@ff680000rockchip,rk3288-pwmhoqdefaultE5^pwmokaypwm@ff680010rockchip,rk3288-pwmhoqdefaultF5^pwm disabledpwm@ff680020rockchip,rk3288-pwmh oqdefaultG5^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0oqdefaultH5^pwm disabledbus_intmem@ff700000 mmio-srampppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsHpower-controller!rockchip,rk3288-power-controllerzh HZpd_vio@9 5chgfdehilkj$IJKLMNOPQpd_hevc@11 5opRSpd_video@12 5Tpd_gpu@13 5UVreboot-modesyscon-reboot-modeRBRBRB RBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4Hjk$#gׄeрxhрxhHsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwH4edp-phyrockchip,rk3288-dp-phy5h24m disabledHjio-domains"rockchip,rk3288-io-voltage-domainokayusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclkH;usb-phy@33445^phyclkH9usb-phy@348H5_phyclkH:watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif  hclkmclk5TWtx 6qdefaultX4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s  5WWtxrxi2s_hclki2s_clk5RqdefaultY9okayH|cypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk #crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkifaceS disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkifaceS` disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk{Z ilm #coreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop{Z def #axiahbdclk[okayportH endpoint@0\Hnendpoint@1]Hkendpoint@2^Heendpoint@3_Hhiommu@ff930300rockchip,iommu  vopb_mmu5 aclkiface{Z SokayH[vop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop{Z  #axiahbdclk`okayportH endpoint@0aHoendpoint@1bHlendpoint@2cHfendpoint@3dHiiommu@ff940300rockchip,iommu  vopl_mmu5 aclkiface{Z SokayH`mipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk{Z 4 disabledportsportendpoint@0eH^endpoint@1fHclvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdsqlcdcg{Z 4 disabledportsport@0endpoint@0hH_endpoint@1iHddp@ff970000rockchip,rk3288-dp@ b5icdppclkjdpo#dp4 disabledportsport@0endpoint@0kH]endpoint@1lHbhdmi@ff980000rockchip,rk3288-dw-hdmi 4 g5hmniahbisfrcec{Z okaymH{portsportendpoint@0nH\endpoint@1oHavideo-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclkp{Z iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkifaceS{Z Hpiommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkifaceS disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5q{Z okayrgpu-opp-tableoperating-points-v2Hqopp@100000000[b~opp@200000000[ b~opp@300000000[bB@opp@400000000[ׄbopp@500000000[ebOopp@600000000[#Fbqos@ffaa0000syscon HUqos@ffaa0080syscon HVqos@ffad0000syscon HJqos@ffad0100syscon HKqos@ffad0180syscon HLqos@ffad0400syscon HMqos@ffad0480syscon HNqos@ffad0500syscon HIqos@ffad0800syscon HOqos@ffad0880syscon HPqos@ffad0900syscon HQqos@ffae0000syscon HTqos@ffaf0000syscon HRqos@ffaf0080syscon HSinterrupt-controller@ffc01000 arm,gic-400@ @ `   Hefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4pgpio0@ff750000rockchip,gpio-banku Q5@H=gpio1@ff780000rockchip,gpio-bankx R5AHzgpio2@ff790000rockchip,gpio-banky S5Bgpio3@ff7a0000rockchip,gpio-bankz T5Cgpio4@ff7b0000rockchip,gpio-bank{ U5DH8gpio5@ff7c0000rockchip,gpio-bank| V5Egpio6@ff7d0000rockchip,gpio-bank} W5Fgpio7@ff7e0000rockchip,gpio-bank~ X5GH}gpio8@ff7f0000rockchip,gpio-bank Y5Hhdmihdmi-cec-c0shdmi-cec-c7shdmi-ddc sspcfg-pull-upHtpcfg-pull-downHupcfg-pull-none$Hspcfg-pull-none-12ma$1 Hxsleepglobal-pwroffsH?ddrio-pwroffsddr0-retentiontddr1-retentiontedpedp-hpd ui2c0i2c0-xfer ssH<i2c1i2c1-xfer ssH%i2c2i2c2-xfer  s sHDi2c3i2c3-xfer ssH&i2c4i2c4-xfer ssH'i2c5i2c5-xfer ssH(i2s0i2s0-bus`ssssssHYlcdclcdc-ctl@ssssHgsdmmcsdmmc-clkvH sdmmc-cmdwHsdmmc-cdtHsdmmc-bus1tsdmmc-bus4@wwwwHsdmmc-pwr sH~sdio0sdio0-bus1tsdio0-bus4@ttttsdio0-cmdtsdio0-clkssdio0-cdtsdio0-wptsdio0-pwrtsdio0-bkpwrtsdio0-inttsdio1sdio1-bus1tsdio1-bus4@ttttsdio1-cdtsdio1-wptsdio1-bkpwrtsdio1-inttsdio1-cmdtsdio1-clkssdio1-pwr temmcemmc-clksHemmc-cmdtHemmc-pwr tHemmc-bus1temmc-bus4@ttttemmc-bus8ttttttttHspi0spi0-clk tHspi0-cs0 tHspi0-txtHspi0-rxtHspi0-cs1tspi1spi1-clk tHspi1-cs0 tH spi1-rxtHspi1-txtHspi2spi2-cs1tspi2-clktH!spi2-cs0tH$spi2-rxtH#spi2-tx tH"uart0uart0-xfer tsH)uart0-ctstuart0-rtssuart1uart1-xfer t sH*uart1-cts tuart1-rts suart2uart2-xfer tsH+uart3uart3-xfer tsH,uart3-cts tuart3-rts suart4uart4-xfer tsH-uart4-cts tuart4-rts stsadcotp-gpio sH2otp-out sH3pwm0pwm0-pinsHEpwm1pwm1-pinsHFpwm2pwm2-pinsHGpwm3pwm3-pinsHHgmacrgmii-pinsssssxxxxsss xxssH7rmii-pinsssssssssssspdifspdif-tx sHXpcfg-pull-none-drv-8ma1Hvpcfg-pull-up-drv-8ma1Hwbacklightbl-ensbuttonspwrbtntHyeth_phyeth-phy-pwrspmicpmic-inttH>dvs-1 uH@dvs-2 uHAusbhost-vbus-drvspwr-3gschosen@serial2:115200n8memorymemoryexternal-gmac-clock fixed-clocksY@ ext_gmacH5gpio-keys gpio-keysLqdefaultybutton@0 =WtbGPIO Key Powerhydgpio-leds gpio-ledsact-led zmmc0heartbeat-led z heartbeatpwr-led = default-onsoundsimple-audio-cardi2srockchip,tinker-codecsimple-audio-card,codec{simple-audio-card,cpu|vsys-regulatorregulator-fixedvcc_sysLK@LK@HBsdmmc-regulatorregulator-fixed R} qdefault~vcc_sd2Z2Z C #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedbroken-cddisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removablemmc-hs200-1_8vmmc-ddr-1_8v#io-channel-cellsvref-supplydmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-modephy-supplysnps,reset-gpiosnps,reset-active-lowsnps,reset-delays-ustx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizedvs-gpiosrockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyvddio-supplyregulator-always-onregulator-boot-onregulator-min-microvoltregulator-max-microvoltregulator-nameregulator-ramp-delayregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellssdcard-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthstdout-pathautorepeatlinux,codelabellinux,input-typedebounce-intervallinux,default-triggersimple-audio-card,formatsimple-audio-card,namesimple-audio-card,mclk-fssound-daistartup-delay-usvin-supply