38(d%amarula,vyasa-rk3288rockchip,rk3288&7Amarula Vyasa-RK3288aliases=/ethernet@ff290000G/i2c@ff650000L/i2c@ff140000Q/i2c@ff660000V/i2c@ff150000[/i2c@ff160000`/i2c@ff170000e/dwmmc@ff0f0000k/dwmmc@ff0c0000q/dwmmc@ff0d0000w/dwmmc@ff0e0000}/serial@ff180000/serial@ff190000/serial@ff690000/serial@ff1b0000/serial@ff1c0000/spi@ff110000/spi@ff120000/spi@ff130000arm-pmuarm,cortex-a12-pmu0cpusrockchip,rk3066-smpcpu@500cpuarm,cortex-a12'@5< Hcpu@501cpuarm,cortex-a12'@5Hcpu@502cpuarm,cortex-a12'@5Hcpu@503cpuarm,cortex-a12'@5Hcpu-opp-tableoperating-points-v2PHopp-126000000[b opp-216000000[ b opp-312000000[b opp-408000000[Qb opp-600000000[#Fb opp-696000000[)|b~opp-816000000[0,bB@opp-1008000000[<bopp-1200000000[Gbopp-1416000000[TfrbOopp-1512000000[ZJb opp-1608000000[_"bpamba simple-buspdma-controller@ff250000arm,pl330arm,primecell%@w5 apb_pclkHdma-controller@ff600000arm,pl330arm,primecell`@w5 apb_pclk disableddma-controller@ffb20000arm,pl330arm,primecell@w5 apb_pclkHYreserved-memorypdma-unusable@fe000000oscillator fixed-clockn6xin24mH timerarm,armv7-timer0   n6timer@ff810000rockchip,rk3288-timer  H 5 a timerpclkdisplay-subsystemrockchip,display-subsystem dwmmc@ff0c0000rockchip,rk3288-dw-mshc р 5Drvbiuciuciu-driveciu-sample  @#resetokay/9K\nydefault dwmmc@ff0d0000rockchip,rk3288-dw-mshc р 5Eswbiuciuciu-driveciu-sample ! @#reset disableddwmmc@ff0e0000rockchip,rk3288-dw-mshc р 5Ftxbiuciuciu-driveciu-sample "@#reset disableddwmmc@ff0f0000rockchip,rk3288-dw-mshc р 5Guybiuciuciu-driveciu-sample #@#resetokay/9nydefaultsaradc@ff100000rockchip,saradc $5I[saradcapb_pclkW #saradc-apb disabledspi@ff110000(rockchip,rk3288-spirockchip,rk3066-spi5ARspiclkapb_pclk  txrx ,ydefault disabledspi@ff120000(rockchip,rk3288-spirockchip,rk3066-spi5BSspiclkapb_pclk txrx -ydefault  disabledspi@ff130000(rockchip,rk3288-spirockchip,rk3066-spi5CTspiclkapb_pclktxrx .ydefault!"#$ disabledi2c@ff140000rockchip,rk3288-i2c >i2c5Mydefault% disabledi2c@ff150000rockchip,rk3288-i2c ?i2c5Oydefault& disabledi2c@ff160000rockchip,rk3288-i2c @i2c5Pydefault' disabledi2c@ff170000rockchip,rk3288-i2c Ai2c5Qydefault( disabledserial@ff180000&rockchip,rk3288-uartsnps,dw-apb-uart 75MUbaudclkapb_pclkydefault) disabledserial@ff190000&rockchip,rk3288-uartsnps,dw-apb-uart 85NVbaudclkapb_pclkydefault* disabledserial@ff690000&rockchip,rk3288-uartsnps,dw-apb-uarti 95OWbaudclkapb_pclkydefault+okayserial@ff1b0000&rockchip,rk3288-uartsnps,dw-apb-uart :5PXbaudclkapb_pclkydefault, disabledserial@ff1c0000&rockchip,rk3288-uartsnps,dw-apb-uart ;5QYbaudclkapb_pclkydefault- disabledthermal-zonesreserve_thermal.cpu_thermald.tripscpu_alert0$p0passiveH/cpu_alert1$$0passiveH0cpu_crit$_0 criticalcooling-mapsmap0;/0@map1;00@gpu_thermald.tripsgpu_alert0$p0passiveH1gpu_crit$_0 criticalcooling-mapsmap0;10@tsadc@ff280000rockchip,rk3288-tsadc( %5HZtsadcapb_pclk #tsadc-apbyinitdefaultsleep2O3Y2cysokayH.ethernet@ff290000rockchip,rk3288-gmac)macirqeth_wake_irq485fgc]Mstmmacethmac_clk_rxmac_clk_txclk_mac_refclk_mac_refoutaclk_macpclk_macB #stmmacethokay5inputydefault6789:rgmii' ='B@ R;b0kusb@ff500000 generic-ehciP 5usbhostt<yusbokayusb@ff5400002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2T 5otghostt= yusb2-phyokayydefault>usb@ff5800002rockchip,rk3288-usbrockchip,rk3066-usbsnps,dwc2X 5otgotg@@ t? yusb2-phyokayusb@ff5c0000 generic-ehci\ 5usbhost disabledi2c@ff650000rockchip,rk3288-i2ce <i2c5Lydefault@okaypmic@1brockchip,rk808&Axin32krk808-clkout2ydefaultBCDDDDD&D2>DJDWDdregulatorsDCDC_REG1qvdd_arm qpH regulator-state-memDCDC_REG2qvdd_gpu PHtregulator-state-memB@DCDC_REG3qvcc_ddrregulator-state-memDCDC_REG4qvcc_io2Z2ZHregulator-state-mem2ZLDO_REG1qvcc_tp2Z2Zregulator-state-mem2ZLDO_REG2 qvcc_codec2Z2Zregulator-state-memLDO_REG3qvdd_10B@B@regulator-state-memB@LDO_REG4qvcc_gpsw@w@regulator-state-memw@LDO_REG5 qvccio_sdw@2ZHregulator-state-mem2ZLDO_REG6 qvcc10_lcdB@B@regulator-state-memw@LDO_REG7qvcc_18w@w@HXregulator-state-memw@LDO_REG8 qvcc18_lcdw@w@regulator-state-memw@SWITCH_REG1qvcc_sd2Z2ZHregulator-state-memSWITCH_REG2qvcc_lan2Z2ZH:regulator-state-memi2c@ff660000rockchip,rk3288-i2cf =i2c5NydefaultEokayHopwm@ff680000rockchip,rk3288-pwmh#ydefaultF5^pwm disabledpwm@ff680010rockchip,rk3288-pwmh#ydefaultG5^pwm disabledpwm@ff680020rockchip,rk3288-pwmh #ydefaultH5^pwm disabledpwm@ff680030rockchip,rk3288-pwmh0#ydefaultI5^pwm disabledbus_intmem@ff700000 mmio-srampppsmp-sram@0rockchip,rk3066-smp-sramsram@ff720000#rockchip,rk3288-pmu-srammmio-sramrpower-management@ff730000&rockchip,rk3288-pmusysconsimple-mfdsHpower-controller!rockchip,rk3288-power-controller.h H\pd_vio@9 5chgfdehilkj$BJKLMNOPQRpd_hevc@11 5opBSTpd_video@12 5BUpd_gpu@13 5BVWreboot-modesyscon-reboot-modeIPRB\RBjRB zRBsyscon@ff740000rockchip,rk3288-sgrfsyscontclock-controller@ff760000rockchip,rk3288-cruv4Hjk$#gׄeрxhрxhHsyscon@ff770000&rockchip,rk3288-grfsysconsimple-mfdwH4edp-phyrockchip,rk3288-dp-phy5h24m disabledHlio-domains"rockchip,rk3288-io-voltage-domainokayXX:"Xusbphyrockchip,rk3288-usb-phyokayusb-phy@320 5]phyclkH?usb-phy@33445^phyclkH<usb-phy@348H5_phyclkH=watchdog@ff800000 rockchip,rk3288-wdtsnps,dw-wdt5p Ookaysound@ff88b0000,rockchip,rk3288-spdifrockchip,rk3066-spdif. hclkmclk5TYtx 6ydefaultZ4 disabledi2s@ff890000(rockchip,rk3288-i2srockchip,rk3066-i2s. 5YYtxrxi2s_hclki2s_clk5Rydefault[?Z disabledcypto-controller@ff8a0000rockchip,rk3288-crypto@ 0 5}aclkhclksclkapb_pclk #crypto-rstokayiommu@ff900800rockchip,iommu@ iep_mmu5 aclkifacet disablediommu@ff914000rockchip,iommu @P isp_mmu5 aclkifacet disabledrga@ff920000rockchip,rk3288-rga 5jaclkhclksclk\ ilm #coreaxiahbvop@ff930000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop\ def #axiahbdclk]okayportH endpoint@0^Hpendpoint@1_Hmendpoint@2`Hgendpoint@3aHjiommu@ff930300rockchip,iommu  vopb_mmu5 aclkiface\ tokayH]vop@ff940000rockchip,rk3288-vop 5aclk_vopdclk_vophclk_vop\  #axiahbdclkbokayportH endpoint@0cHqendpoint@1dHnendpoint@2eHhendpoint@3fHkiommu@ff940300rockchip,iommu  vopl_mmu5 aclkiface\ tokayHbmipi@ff960000*rockchip,rk3288-mipi-dsisnps,dw-mipi-dsi@ 5~d refpclk\ 4 disabledportsportendpoint@0gH`endpoint@1hHelvds@ff96c000rockchip,rk3288-lvds@5g pclk_lvdsylcdci\ 4 disabledportsport@0endpoint@0jHaendpoint@1kHfdp@ff970000rockchip,rk3288-dp@ b5icdppclktlydpo#dp4 disabledportsport@0endpoint@0mH_endpoint@1nHdhdmi@ff980000rockchip,rk3288-dw-hdmi.4 g5hmniahbisfrcec\ okayoportsportendpoint@0pH^endpoint@1qHcvideo-codec@ff9a0000rockchip,rk3288-vpu   vepuvdpu5 aclkhclkr\ iommu@ff9a0800rockchip,iommu vpu_mmu5 aclkifacet\ Hriommu@ff9c0440rockchip,iommu @@@ o hevc_mmu5 aclkifacet disabledgpu@ffa30000#rockchip,rk3288-maliarm,mali-t760$ jobmmugpu5s\ okaytgpu-opp-tableoperating-points-v2Hsopp@100000000[b~opp@200000000[ b~opp@300000000[bB@opp@400000000[ׄbopp@500000000[ebOopp@600000000[#Fbqos@ffaa0000syscon HVqos@ffaa0080syscon HWqos@ffad0000syscon HKqos@ffad0100syscon HLqos@ffad0180syscon HMqos@ffad0400syscon HNqos@ffad0480syscon HOqos@ffad0500syscon HJqos@ffad0800syscon HPqos@ffad0880syscon HQqos@ffad0900syscon HRqos@ffae0000syscon HUqos@ffaf0000syscon HSqos@ffaf0080syscon HTinterrupt-controller@ffc01000 arm,gic-400@ @ `   Hefuse@ffb40000rockchip,rk3288-efuse 5q pclk_efusecpu_leakage@17pinctrlrockchip,rk3288-pinctrl4pgpio0@ff750000rockchip,gpio-banku Q5@HAgpio1@ff780000rockchip,gpio-bankx R5Agpio2@ff790000rockchip,gpio-banky S5Bgpio3@ff7a0000rockchip,gpio-bankz T5Cgpio4@ff7b0000rockchip,gpio-bank{ U5DH;gpio5@ff7c0000rockchip,gpio-bank| V5Egpio6@ff7d0000rockchip,gpio-bank} W5Fgpio7@ff7e0000rockchip,gpio-bank~ X5Ggpio8@ff7f0000rockchip,gpio-bank Y5HH}hdmihdmi-cec-c0uhdmi-cec-c7uhdmi-ddc uupcfg-pull-up)Hvpcfg-pull-down6Hwpcfg-pull-noneEHupcfg-pull-none-12maER Hxsleepglobal-pwroffuHCddrio-pwroffuddr0-retentionvddr1-retentionvedpedp-hpd wi2c0i2c0-xfer uuH@i2c1i2c1-xfer uuH%i2c2i2c2-xfer  u uHEi2c3i2c3-xfer uuH&i2c4i2c4-xfer uuH'i2c5i2c5-xfer uuH(i2s0i2s0-bus`uuuuuuH[lcdclcdc-ctl@uuuuHisdmmcsdmmc-clkuH sdmmc-cmdvHsdmmc-cdvHsdmmc-bus1vsdmmc-bus4@vvvvHsdio0sdio0-bus1vsdio0-bus4@vvvvsdio0-cmdvsdio0-clkusdio0-cdvsdio0-wpvsdio0-pwrvsdio0-bkpwrvsdio0-intvsdio1sdio1-bus1vsdio1-bus4@vvvvsdio1-cdvsdio1-wpvsdio1-bkpwrvsdio1-intvsdio1-cmdvsdio1-clkusdio1-pwr vemmcemmc-clkuHemmc-cmdvHemmc-pwr vHemmc-bus1vemmc-bus4@vvvvemmc-bus8vvvvvvvvHspi0spi0-clk vHspi0-cs0 vHspi0-txvHspi0-rxvHspi0-cs1vspi1spi1-clk vHspi1-cs0 vH spi1-rxvHspi1-txvHspi2spi2-cs1vspi2-clkvH!spi2-cs0vH$spi2-rxvH#spi2-tx vH"uart0uart0-xfer vuH)uart0-ctsvuart0-rtsuuart1uart1-xfer v uH*uart1-cts vuart1-rts uuart2uart2-xfer vuH+uart3uart3-xfer vuH,uart3-cts vuart3-rts uuart4uart4-xfer vuH-uart4-cts vuart4-rts utsadcotp-gpio uH2otp-out uH3pwm0pwm0-pinuHFpwm1pwm1-pinuHGpwm2pwm2-pinuHHpwm3pwm3-pinuHIgmacrgmii-pinsuuuuxxxxuuu xxuuH6rmii-pinsuuuuuuuuuuphy-int vH9phy-pmebvH8phy-rstyH7spdifspdif-tx uHZpcfg-output-highaHypmicpmic-intvHBusb_hostphy-pwr-en yH>usb2-pwr-en uH~usb_otgotg-vbus-drv uH{chosenm/serial@ff690000memorymemorydc12-vbatregulator-fixed qdc12_vbatHzvboot-3v3regulator-fixed qvboot_3v32Z2Zyzvsys-regulatorregulator-fixedqvcc_sys8u 8u yzHDvboot-5vregulator-fixed qvboot_svLK@LK@yzv3g-3v3regulator-fixedqv3g_3v32Z2Zyzvsus-5vregulator-fixedqvsus_5vLK@LK@yH|vusb1-5vregulator-fixed qvusb1_5v ]A ydefault{LK@LK@y|vusb2-5vregulator-fixed qvusb2_5v ]} ydefault~LK@LK@y|external-gmac-clock fixed-clocksY@ ext_gmacH5 #address-cells#size-cellscompatibleinterrupt-parentmodelethernet0i2c0i2c1i2c2i2c3i2c4i2c5mshc0mshc1mshc2mshc3serial0serial1serial2serial3serial4spi0spi1spi2interruptsinterrupt-affinityenable-methodrockchip,pmudevice_typeregresetsoperating-points-v2#cooling-cellsclock-latencyclockscpu0-supplyphandleopp-sharedopp-hzopp-microvoltranges#dma-cellsarm,pl330-broken-no-flushpclock-namesstatusclock-frequencyclock-output-names#clock-cellsarm,cpu-registers-not-fw-configuredportsmax-frequencyfifo-depthreset-namesbus-widthcap-mmc-highspeedcap-sd-highspeedcard-detect-delaydisable-wppinctrl-namespinctrl-0vmmc-supplyvqmmc-supplynon-removable#io-channel-cellsdmasdma-namesreg-shiftreg-io-widthpolling-delay-passivepolling-delaythermal-sensorstemperaturehysteresistripcooling-devicepinctrl-1pinctrl-2#thermal-sensor-cellsrockchip,hw-tshut-temprockchip,hw-tshut-moderockchip,hw-tshut-polarityinterrupt-namesrockchip,grfassigned-clocksassigned-clock-parentsclock_in_outphy-supplyphy-modesnps,reset-active-lowsnps,reset-delays-ussnps,reset-gpiotx_delayrx_delayphysphy-namesdr_modeg-np-tx-fifo-sizeg-rx-fifo-sizeg-tx-fifo-sizerockchip,system-power-controllerwakeup-sourcevcc1-supplyvcc2-supplyvcc3-supplyvcc4-supplyvcc6-supplyvcc7-supplyvcc8-supplyvcc9-supplyvcc10-supplyvcc11-supplyvcc12-supplyregulator-nameregulator-min-microvoltregulator-max-microvoltregulator-always-onregulator-boot-onregulator-off-in-suspendregulator-on-in-suspendregulator-suspend-microvolt#pwm-cells#power-domain-cellspm_qosoffsetmode-normalmode-recoverymode-bootloadermode-loader#reset-cellsassigned-clock-rates#phy-cellsaudio-supplybb-supplydvp-supplyflash0-suuplyflash1-supplygpio30-supplygpio1830lcdc-supplysdcard-supplywifi-supply#sound-dai-cellsrockchip,playback-channelsrockchip,capture-channels#iommu-cellsrockchip,disable-mmu-resetpower-domainsiommusremote-endpointddc-i2c-busmali-supplyinterrupt-controller#interrupt-cellsgpio-controller#gpio-cellsrockchip,pinsbias-pull-upbias-pull-downbias-disabledrive-strengthoutput-highstdout-pathvin-supplyenable-active-high